United Business Media EE Times


Search

HOMEMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSSMost Popular contentTrusted Sources

 


Simplex power-grid libraries roll, Adaptive qualifies core
Print this article Email this article Reprints RSS Digital Edition

EE Times


Simplex Solutions Inc. says its IP Power Grid Library program will give users of the company's VoltageStorm power-grid verification tool prevalidated power-grid libraries for a variety of system-on-chip components, including standard cells, I/Os, embedded processors and memories. Embedded-processor vendor ARM Ltd. and physical-library vendor Virtual Siliconare among the first companies to join the program, said Simplex (Sunnyvale, Calif.).

The prevalidated power-grid libraries will provide SoC designers with direct access to the hierarchical verification approach introduced with the latest version of VoltageStorm SoC, while maintaining the transistor-level accuracy required for deep-submicron power-integrity analysis, the company said. Once largely considered a second- or third-order effect, IR or voltage drop has become a first-order problem, according to Simplex and its partners.

Intellectual-property vendors can package the power-grid characterization libraries with their IP to facilitate VoltageStorm SoC verification and ensure customers are designing IR-drop-compliant systems-on-chip. "If the libraries are supplied with the cores, it makes it much easier for the user to implement these blocks," said Janet Greene, senior marketing manager with Simplex. Further, "VoltageStorm SoC comes with the tools and instructions to let designers create these libraries for their own blocks."

Prevalidated power-grid libraries will be available to ARM's foundry partners by the end of the year for select cores in the ARM9 family of 32-bit embedded RISC processors. The prevalidated power-grid libraries are available by request to Virtual Silicon's customers for select standard-cell libraries. Greene said Simplex is in negotiations to add partners to the program.Visit www.simplex.com, www.virtual-silicon.com and www.arm.com.

---

Programmable-core vendor Adaptive Silicon says it has successfully fabricated and qualified its MSA 2500 test chips on Taiwan Semiconductor Manufacturing Co.'s 0.18-micron process. The Los Gatos, Calif., company said the core is 100 percent functional on TSMC silicon, enabling the manufacture of systems-on-chip with the technology at that foundry. Adaptive has previously qualified its core-which enables placement of programmable-logic blocks on standard-cell SoC devices-on LSI Logic processes.

"With the qualification of TSMC's 0.18-micron process, our customers now have another reliable manufacturing option to increase the flexibility of their designs by embedding reprogrammability for critical functions of their SoC devices," said Tim Garverick, Adaptive Silicon's president and chief operating officer. See www.asi.com.

---

ARC Cores Inc. has licensed its configurable 32-bit processor technology and USB controller to RF Micro Devices, which will use them in a Bluetooth baseband controller. RF Micro said it will combine the RF3001 ARC-based baseband controller with its existing RF2968 transceiver to create a compact, ultralow-cost solution for Bluetooth-ready PCs, laptops and peripherals (www.arccores.com).





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


  Free Subscription to EE Times
First Name Last Name
Company Name Title
Email address
  Click here for your Free Subscription to EETimes Europe
 
CAREER CENTER
Looking for a new job?
SEARCH JOBS
SPONSOR

RECENT JOB POSTINGS
CAREER NEWS
SRC Expands R&D Centers
The Semiconductor Research Corp has added a new center to its university R&D efforts.

For more great jobs, career related news, features and services, please visit EETimes' Career Center.



All White Papers »   

  Design Resources
Designing for a dual Galileo-based GPS system
Malcolm Lomer of SiGe Semiconductor discusses GPS design challenges with the Galileo satellite system.
More »
 
Education and
Learning


Learn Now:












Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
Network Websites
International
Network Features




All materials on this site Copyright © 2009 TechInsights, a Division of United Business Media LLC All rights reserved.
Privacy Statement | Terms of Service | About