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Mentor meets On-The-Go, PicoTurbo does 32 bits
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Mentor Graphics Corp. has released a dual-role USB 2.0 controller macrocell that it says complies with both the current USB 2.0 standard for full-speed functions and the new On-The-Go supplement for point-to-point communications. Mentor said it will provide customers with a verified and proven soft core and with an evaluation board that minimizes product-development risk.

The Inventra MUSBFDRC is a synthesizable, dual-role USB controller macrocell that supports host and peripheral functions in point-to-point data transfers. Designers can use the core for both peripheral and host applications, configuring the core as required by the application.

According to Mentor, the product supports session control and host negotiation protocols; is configurable for up to 15 additional transmit end points and up to 15 additional receive end points; and has a built-in PVCI-compatible CPU I/F, and optional Amba-AHB bridge graphical user interface for core configuration.

The On-The-Go supplement to the USB 2.0 targets such applications as mobile phones, PDAs, digital cameras and MP3 audio players, allowing them to connect directly to a peripheral without the need for a host PC.

Mentor said the evaluation board shows how the soft core can be configured as a standard USB peripheral within a mass-storage device when connected directly to a PC.

The core and evaluation board will be available in the first quarter. See www.mentor.com/inventra.

PicoTurbo has released a microprocessor core for advanced consumer devices running Linux, Windows CE, Palm and Symbian operating systems.

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The pT-110Mx core is a new member of the pT-110 family. It is said to have been designed in response to demand for a 32-bit synthesizable core with virtual memory capabilities that could be embedded in consumer equipment, such as PDAs, pocket PCs, smart phones, handheld games, cellular phones, Internet appliances, set-top boxes, advanced wireless handsets, networking gear and other consumer electronics products.

The core has a five-stage pipeline. Typical performance is said to be 400 MHz, with a 90k- to 180k-gate footprint. Power consumption is 0.34 to 0.7 milliwatt/MHz, and test coverage is 98 percent on 0.13-micron processes.

The pT-110Mx is available for licensing immediately. Thus far the core has been simulated and tested on FPGA. A test chip tapeout for the core is forthcoming, PicoTurbo said. More information is available at www.picoturbo.com.

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MPU core vendor ARM has made Andor System Support Co. Ltd. its development-tools distributor in Japan and the Asia-Pacific region. According to ARM, Andor will provide development tools as well as support services for ARM offerings in the regions covered by the deal.

ARM development tools include software development offerings, code-generation tools and debuggers, and system development and evaluation boards.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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