United Business Media EE Times


Search

HOMEMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSSMost Popular contentTrusted Sources

 


Verisity spins test kit for ARM; two team on Bluetooth
Print this article Email this article Reprints RSS Digital Edition

EE Times


ARM Ltd. has teamed with Verisity Ltd. on verification and validation tool kits for ARM processors based on Verisity's "e" verification language and testbench automation tool, Specman Elite. The testbenches are part of the ARM PrimeXsys platform for development of complex ASICs for wireless systems.

The ARM PrimeXsys platform verification tool kit allows users to verify that an ASIC under development will meet its functional requirements. The companies said the kit is reusable across multiple partners and projects, which saves engineering effort. ARM supplies many of the verification tests, another time saver. It also provides tests to check that all the components of the ASIC comply with Amba-bus technology.

The companies said the verification tool kit can test an entire ASIC's functionality, not just the ARM PrimeXsys wireless platform. STMicroelectronics has adopted the platform as the foundation of its large mobile-Internet application-specific standard-product line and is using the verification and validation testbenches to add its own unique intellectual property.

The PrimeXsys platform is available now, under ARM's standard IP licensing model for implementation in an ASIC or ASSP design. It includes register-transfer-level code, simulation models, development tools, firmware, OS ports, validation suites and methodologies. Key ARM partners will sample products based on the platform in the first half.

Wireless and DSP system-development company Adamya Technologies Inc. and configurable-core vendor Tensilica Inc. have linked up to offer the C-Blue Bluetooth application solution package for Tensilica's Xtensa configurable microprocessor architecture. Used in conjunction with an external Blue RF-compliant radio, the package enables designers to meet the critical sub-$5 cost point in their Bluetooth system-on-chip (SoC) designs, the companies said. The Bluetooth 1.1-compliant software baseband and stack combine special hardware to accelerate baseband and protocol functions created in the Tensilica Instruction Extension (TIE) language with an optimized implementation of Adamya's Bluetooth software that uses this special hardware.

Traditionally, Bluetooth solutions have been developed using either standard products or dedicated hardwired logic in ASICs. The standard-product approach, according to the companies, requires dedicated components that add cost and consume valuable pc-board real estate, while the hardwired logic in ASICs creates integration and verification challenges with a resulting increase in development time.

By contrast, the companies said, the Xtensa C-Blue package is a processor-based solution that facilitates SoC integration and simplifies verification through standard software development tools. The companies claim that the use of TIE customized hardware instructions results in an extremely efficient implementation that requires an average of only 8 MHz to run both the baseband and protocol stack functions. The result is faster time-to-market of SoC devices for consumer applications such as digital imaging systems, set-top boxes, wireless handsets and PDAs.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


  Free Subscription to EE Times
First Name Last Name
Company Name Title
Email address
  Click here for your Free Subscription to EETimes Europe
 
CAREER CENTER
Looking for a new job?
SEARCH JOBS
SPONSOR

RECENT JOB POSTINGS
CAREER NEWS
SRC Expands R&D Centers
The Semiconductor Research Corp has added a new center to its university R&D efforts.

For more great jobs, career related news, features and services, please visit EETimes' Career Center.



All White Papers »   

  Design Resources
Designing for a dual Galileo-based GPS system
Malcolm Lomer of SiGe Semiconductor discusses GPS design challenges with the Galileo satellite system.
More »
 
Education and
Learning


Learn Now:












Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
Network Websites
International
Network Features




All materials on this site Copyright © 2009 TechInsights, a Division of United Business Media LLC All rights reserved.
Privacy Statement | Terms of Service | About