The companies said the component provides advanced, constrained-random OCP transaction generation, functional-coverage information, transaction logging and scoreboarding. Sonics' proprietary protocol checking makes it possible to perform on-the-fly verification of compliance to the OCP protocol. According to the companies, the OCP DVC is a full test environment supporting the development of individual IP or complete SoC devices.

Developed from the OCP 2.1 spec, the DVC supports Basic, Simple, Complex and Sideband protocols. It is compatible with OCP-IP CoreCreator tools and functions as one or more OCP master/slave modules. Monitoring, on-the-fly protocol-checking, scoreboarding and functional-coverage blocks are instantiated by the user, then configured using the constraint features of Verisity's Specman "e" language. Full-random, constrained-random and directed-transaction generation can be used, with or without error injection.

The OCP DVC (www.qualis.com/dcv.ocp.specman.pdf) will be available in September. All Qualis DVCs support interfacing to Verilog and VHDL designs. Annual licenses are at $10,000 each, with volume discounts available.

Axys Design Automation Inc. has released a fast cycle-accurate model for the TeakLite DSP core from DSP Group Inc. Developed using Axys' MaxCore tool and the processor description in the C-based Lisa language, the MaxCore model is said to deliver more than 1 million cycles/second on a 1-GHz Pentium host. It supports scalable multicore simulation and debug.

The company claims the model has been matched to DSP Group's set of hardware test vectors to verify one-for-one correlation between the simulation model and its register-transfer-level reference on a cycle-by-cycle basis. It targets designers of communications and consumer devices.

Axys also offers the cycle-accurate TeakLite model as part of the co-verification models available for the Mentor Graphics Seamless hardware/software co-verification environment. The Seamless TeakLite Processor Support Package will be available through Mentor channels.

Atsana Semiconductor Corp. has licensed the ARM922T core for its media processor. Atsana will use the core in tailoring its embedded processor for wireless multimedia.

The chip is claimed to possess the processing clout to encode or decode video and images to standards such as MPEG-4, JPEG and JPEG2000. It offers 5x to 15x the processing capability and consumes as little as one-third the power of existing multimedia processors, Atsana said.