According to the company, the new RealViewICE emulator provides JTAG emulation for high-speed downloads in excess of 600 kbytes/second over JTAG @ 10 MHz.

Arm said this level of performance is enabled by high-speed host connections via Ethernet or USB. The optional RealView Trace module plugs into the RealViewICE unit and captures information from the on-chip embedded trace macrocell at data rates in excess of 200 MHz.

Arm claims the resulting trace information allows the developer to identify difficult software/hardware interaction bugs and optimize performance.

The RealView Debugger addresses the evolution of today's systems to multicore system-on-chips (SoCs) that contain both DSP and ARM cores on the same chip.

The company said that code running on multiple processors can be debugged in the same session using a single debug kernel, enabling independent or synchronized stop, start and stepping. OS-aware debugging is available today for Symbian OS, ATI Nucleus and ThreadX. ARM said it is working with its OS partners to offer more support in the future.

ARM offers its debugger in multiple configurations priced from $2,000 to $12,000. Both products will be available in the fourth quarter.

Tensilica Inc. has become the first configurable processor intellectual-property vendor to license IBM's CoreConnect on-chip bus architecture. The company announced it expects to offer an Xtensa-to-CoreConnect bus bridge in the fourth quarter.

According to the company, the new bridge will interface Tensilica's configurable Xtensa processor to the IBM CoreConnect bus so customers can quickly merge multiple Xtensa processors to CoreConnect-based SoC designs.