FPGA vendor Xilinx Inc. (San Jose, Calif.) has added a fast Fourier transform core to its DSP library and has enhanced a number of existing cores.

The parameterizable FFT targets orthogonal frequency-division multiplexed wireless and wireline systems. It allows trade-offs to be made between FPGA footprint and performance, supporting data processing of 200 Megasamples/second and transform lengths between 16 and 16,384 points. It is said to meet the requirements of such military radar-imaging systems as inverse synthetic-aperture radar.

The company also has enhanced several existing DSP cores, including a general-purpose Viterbi decoder, a multiply-accumulate-based finite impulse response filter, a direct digital synthesizer (DDS) and a Cordic (coordinate rotation digital computer) offering.

The Viterbi decoder has been made faster. Using the industry-standard constraint length of 7, the parameterizable core achieves decoding rates of 199 Msamples/s for a single channel and 273 Msamples/s for multichannel designs. The core leverages Xilinx FPGA device features to achieve multichannel Viterbi decoding. Thus, the same area once required for a single Viterbi decoder can now be used to decode 32 convolutionally encoded data streams, Xilinx said.

The enhanced core also supports trellis code modulation and reduced-latency decode. Designers can select between serial and parallel implementations.

Xilinx's DDS core add-on for the Viterbi decoder tacks on capability for implementing an array of digital down- and upconverters. The MAC FIR add-on provides a system-level view of the FPGA multiplier array and constructs a multi-MAC implementation based on the available FPGA master clock frequency and required filter sample rate.

Finally, the Cordic add-on gives users more control over the core's implementation, letting customers specify such key parameters as the instantiation of the coarse rotation module, the number of implemented iterations and the desired internal precision.

The cores are downloadable from www.xilinx.com/dsp. Most of them are included with the latest version of the Xilinx Core Generator System, though the Viterbi decoder is licensed separately, as a parameterizable netlist priced at $5,000. A full system hardware evaluation version of the Viterbi decoder is available at www.xilinx.com/ipcenter/ipevaluation/index.htm.

MIPS Technologies Inc. said that Cirrus Logic Inc. has taken a MIPS license and that Taiwan's ADMtek Inc. has taped out a MIPS-based system-on-chip aimed at home gateways. The Cirrus license is for a range of 32-bit processor cores, including the MIPS32 4KEc, 4KEm, 4KEp and M4K. Cirrus will use the cores in product development for such applications as DVD players, receivers and recorders; personal video recorders; and audio/video receivers.

ADMtek's SoC was implemented in 0.18-micron process technology by Chartered Semiconductor and integrates a MIPS32 4Kc core with a six-port switch engine, PHY, USB 1.1 host and PCI bridge. The chip includes NAND flash and NOR flash support.

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