Cambridge Consultants Ltd. has produced a third member of its XAP family of RISC processor cores, optimized to handle 32-bit data. Available for license as a Verilog RTL file, the design can be implemented in fewer than 50,000 gates, the company said.
Cambridge Consultants (CCL; (Cambridge, England), a consultancy active in the electronics and health care sectors, developed the XAP processor as an extremely low-gate-count 16-bit RISC design in the early 1990s. The XAP2 is used by CCL spin-off Cambridge Silicon Radio Ltd. in all its Bluetooth cores.
CCL said the XAP3 brings code density and power economy to deeply embedded 32-bit applications. CCL's nearby neighbor, ARM Holdings plc, has claimed to offer the industry's lowest MIPS-per-watt figures at the 32-bit level.
The XAP3's instruction set has been optimized to exploit the code-efficient features of state-of-the-art C-language compiler technology, reducing memory requirements and power consumption, compared with other designs. The design can be made using either ASIC or FPGA techniques.
The XAP3 has a Von Neumann architecture allowing code and data to be mixed within its flat 4-Gbyte memory space. There is hardware support for position-independent code and secure operation through privileged modes that prevent user programs from corrupting the operating system kernel.
Parallel construction
The XAP3's instruction set, assembly language and ANSI C compiler were designed in parallel. The compile chain is based on Codemist C-compiler technology, which has many novel features to optimize performance, while minimizing program size and memory requirements.
A Linux real-time operating system port for XAP3 is under way. The XAP3 road map includes software support for the Nucleus OS, the GCC compiler (providing C++ and Java) and TCP/IP.
"Because XAP3 programs are position-independent, it is easy to locate them anywhere in memory with minimal load-time fix-ups," said Alistair Morfey, head of the ASICs group at CCL, in a statement. "This will enable XAP3 systems to run multiple software applications or device drivers from different suppliers."
- Additional reporting by Peter Clarke
Michael Santarini is senior editor covering electronic design automation for EE Times.