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HDL front ends aren't core competency
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In his 2000 book titled, "Living on the Fault Line," high-tech guru Geoffrey Mooore makes an eloquent case for corporations to focus on "core" and outsource "context."

In Moore's view, core refers to the activities that directly affect the competitive advantage of an organization. In other words, activities that differentiate it from the competition. All other activities, and those are often the bulk of an organization, are context. The important message, of course, is that a company should outsource its context and focus its best and brightest on its core.

The good news is that one company's context is another company's core. A good example is the paper multiplication industry. Having a photocopy machine at work is handy, but once a manual needs to be reproduced for customer ship, isn't it more efficient to go to Kinko's?

It picks up and delivers materials, keeps its machines humming 24 hours a day, and is cheaper than having someone burning the midnight oil changing the office copier's toner. The time saved should be used on planning the next product.

The core versus context discussion is often related to the buy versus make question. If a good solution is available for a well-defined problem, why bother re-inventing the wheel and providing a homegrown solution? Chances are that the task at hand is context to the application. And, through purchase, a company may very well accelerate introduction of a core product by several months.

This concept of core versus context is applicable to EDA. Most EDA companies have already outsourced some context activities in their EDA tools, such as license managers. Why would anyone bother writing their own software for licensing management if the same can be achieved with FlexLM, the battle-tested and production-proven license manager originally developed by Globetrotter, and now part of Macrovision?

Hardware description language (HDL) front-ends, long the core of synthesis companies such as Exemplar Logic, Synopsys, and Synplicity, have recently entered the ranks of context for most EDA companies. Nowadays, EDA products in such diverse fields as design for test, formal verification, synthesis and emulation all require Verilog and VHDL parsers and elaborators.

As many companies have found, building HDL parsers and elaborators is not an altogether easy task. Several person years, not counting future debug activity, can be required to put a reliable system together. And at the end, it will not differentiate a company's product from the competition because they all support the same HDLs.

In Moore's view, a much-preferred solution would be to acquire a production-proven, fully debugged HDL front-end and focus the engineering team on a company's core competency, whether that is in formal verification, emulation, hardware acceleration, or design for test.

Here's a test. To find out if a company's HDL front-end is core or context, ask the following questions:

  • Does it make the company more competitive?
  • Can the company distinguish itself from the competition with its HDL front-end?
  • Does the expertise reside in house to build and support it?
Chances are, the Verilog and VHDL support are merely context to the application, necessary but non-discriminating. That means it may be time to start looking around for a solution from a company that makes HDL front-ends its core.

Michiel Ligthart is vice president of operations at Verific Design Automation.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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