After I reported last month that Aart de Geus, CEO of Synopsys, had exiled VHDL to the small-money FPGA world with the conviction that the new Verilog would dominate the big-money ASIC world, two users e-mailed me their belief that FPGAs are going to take over ASICs anyway.

"I saw this as a fairly desperate attempt by Aart to get System Verilog acceptance," wrote David Bishop of Kodak. "People just don't do very many ASICs anymore. They do FPGAs. FPGAs are far more cost-effective these days. Most FPGA designs are done with VHDL."

Andy Jones of Lockheed Martin pretty much agreed with David while also challenging me on my "small money" reference to FPGAs.

For the sake of the EDA industry, I hope David and Andy are wrong.

In 2001, according to Dataquest, the ASIC market totaled $16.6 billion, while the FPGA market was $2.6 billion. What's more interesting is that the 2001 ASIC EDA market was $2.2 billion, while the FPGA EDA market was $91.1 million. Nope, that's not a mistake: It's ASIC EDA in billions vs. FPGA EDA in millions.

Do the math, and you'll see that for every dollar spent on an ASIC project, roughly 12 cents goes to an EDA vendor, whereas for every dollar spent on an FPGA project, roughly 3.4 cents goes to an EDA vendor. Not good.

It's the old "why buy what you have been getting for free" story, according to Gary Smith, senior EDA analyst at Dataquest. "Altera and Xilinx have fouled their own nest: Their free tools spoil the FPGA EDA market," he said. "EDA vendors know that there's no money to be made in FPGA tools."

So FPGAs appear to be the slums of the EDA world. If design does go all-FPGA as David and Andy predict, then the $2.3 billion EDA industry will shrink down to $628 million.

That's what 3.4 percent vs. 12 percent can do to you. Ouch.

John Cooley runs the e-mail synopsys users group (ESNUG), is a contract asic designer and loves hearing from engineers at jcooley@theworld.com or (508) 429-4357.

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