It Was a Long Walk Back ...
As this is my first column, I'd like to take a little time to introduce myself and tell you something of my background. Truth to tell, I find it more than a little strange that my career pre-dates computing and EDA as we know it today. When I started college in the mid 1970s, we created programs in Fortran on punched cards and then hand-carried them across town to the computer building.

We'd return to pick up the results generated by the program a week or so later, only to be presented with our original punched cards and a small slip of paper saying something like "Syntax error: missing comma on line 2" - it was a long walk back to the main campus with a little tear rolling down one's cheek. Using this technique, it could take an entire semester to get even the simplest program running, by which time you'd forgotten what you were trying to do in the first place.

The Chin-Lee Optimization Technique
When I started my first job in 1980, it was as a member of a CPU design team for mainframe computers. Unusually for that time, we were working with one of the early ASIC technologies. Did we use schematic capture, simulation, synthesis, and layout tools? Don't make me laugh! We hand-drew our gate-level schematics using pencil and paper. Functional verification came in the form of our sitting round a table performing a peer review of each other's schematics. Timing analysis was carried out using a pencil, paper, and table of gate and unit load delays (no one I knew could afford one of the early handheld electronic calculators).

Tools like logic synthesis weren't something we dared imagine in our wildest dreams. However, we did have access to an incredibly efficacious logic optimization technique in the form of a Chinese team member we'll call Chin-Lee (names have been changed to protect the innocent). From the beginning, I was told to concentrate on capturing the functionality of the circuit and not to worry about squeezing it into a device containing only a few thousand logic gates. Chin-Lee would then disappear into the corner to perform his magic and optimize your circuit down to a fraction of its original size - the man was truly incredible!

IC layout? It scares me to recall. I remember outputting strips of zigzag computer line-printer paper from a humongous text file. Different characters were used to represent silicon, layer 1 and 2 metalization, vias, and so on. Once you'd printed approximately 20 strips each 20 feet long, you'd join them with sticky tape and then walk back and forth in your stocking feet comparing your original (post-Chin-Lee) schematics with the final layout. Oh, the fun we had.

It's a Funny Old World
Perhaps the most useful training I ever received came in the early 1980s when I started writing test programs for GenRad 2225 functional testers. A customer would present us with a "known-good" board (that often wasn't) and a corresponding schematic. If we were lucky, the board and the schematic differed by no more than one or two revision levels. Armed only with the schematic, our task was to try to guess as to the intended function of the board and then write a testbench to stimulate the inputs and observe the responses at the outputs. Although I didn't know it at the time, this training was to prove invaluable when I moved into simulation and, later, logic synthesis.

When I first came to the USA in 1990, my expertise was primarily in digital logic design, so you can only imagine my surprise when I was given the position of analog product marketing manager ... it's a funny old world when you come to think about it.

And then came the writing. Who knew? Certainly not my high-school teachers who said I was a complete idiot who would never make anything of himself. Starting with a short magazine article on some topic I can no longer recall, the floodgates opened and, before I knew what was happening, I was up to my knees in articles, technical papers, and books I'd written.

And so we find ourselves with this column. I was of course delighted when asked to contribute to this new, expanded EEdesign.com website. However, I'd like to think of this as being "our" column - something that reflects the interests of everyone who is out there in the trenches up to their ears in EDA alligators. So please feel free to drop me a line with suggestions for topics you'd like me to cover or telling me about a particularly cool EDA tool you'd like me to discuss.

Until next time, have a good one!

Clive (Max) Maxfield is president of Techbites Interactive, a marketing consultancy firm specializing in high-tech. Co-author of the book "EDA: Where Electronics Begins," Max was once referred to as a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way.