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Adaptive ICs up-end EDA
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Adaptive ICs up-end EDA

In the old days, once you'd designed a circuit, it tended not to mutate into something else. However, we're starting to sail into murky waters where an IC's internal architecture can be transmogrified on the fly. As you can imagine, this is going to place something of a strain on traditional design methodologies and EDA tools.

The problem is that the vast bulk of today's digital IC design practices are based on the principle of having a "static" view of a design. This means that once you've captured the design's intent, you can simulate it, synthesize it, and ultimately progress it to an implementation. The key point is that throughout this process you are designing the device to have well defined functionality that, hopefully, isn't going to change.

Periodically, a new and disruptive technology becomes available. Consider the emergence of FPGAs at the beginning of the 1990s. SRAM-based FPGAs provide the ability to be reconfigured while remaining resident in the system. For example, on power-up a device might be configured to perform some form of self and system test, and then be reconfigured to perform its main system functions. Alternatively, an FPGA acting as an interface device can be reconfigured to handle a variety of different communications protocols as required.

Having devices that can be reconfigured in the system stretches the capabilities of traditional EDA tools. However, the examples mentioned above can be represented as a limited number of static views, each of which can be designed and verified independently. The problem arises if we wish to move to a more dynamic scenario.

The concept of reconfigurable computing (RC) emerged in the mid-1990s. The original advocates of RC painted glorious pictures of a world in which devices could be dynamically reconfigured to perform new functions as required. Unfortunately, there were a number of problems with the original flavors of RC, not the least that conventional EDA tools were simply not capable of handling this form of dynamically reconfigurable functionality. Over time, RC came to mean different things to different people. The terminology was adopted by adjacent technologies, and today it has largely fallen by the wayside.

Poised on the brink
Today we are poised on the brink of a new disruptive technology - an innovative new digital IC called the adaptive computing machine (ACM) from Quicksilver Technology. These cunning little rascals can be have their internal architecture modified on-demand hundreds of thousands of times a second while consuming very little power. This distinguishes the ACM from any other IC implementation technology, because it allows it to perform spatial and temporal segmentation (SATS).

SATS is the process of rapidly adapting the ACM's dynamic hardware resources to perform the various portions of algorithms in different segments of time, and in different locations on the ACM. At the lowest level, we can consider this to be similar to the dynamic, instruction-by-instruction, on-the-fly creation of focused execution units.

As one example application area, consider a mobile wireless communications device such as a cell phone. Using traditional IC implementation technologies, many of the core algorithms are "frozen in silicon," which means that each algorithm is permanently resident, occupying silicon real estate, and consuming power. By comparison, a single ACM can be adapted on the fly to perform each of the functions in turn, resulting in tremendous power savings as compared to a DSP and silicon area savings as compared to an ASIC.

Beam me up, Scottie
It all sounds so easy when you say it quickly, doesn't it? But back in the real world, one of the keys to ACM success will be the provision of appropriate tools. Due to the way in which ACMs function, these tools will have similarities with both embedded software and DSP development environments.

First, it will be necessary to provide a cycle-accurate software simulation environment. This will run the ACM's operating system and be used to observe the point-to-point communications between applications running inside the device. Due to the fact that real-world systems may also include supporting ASIC, DSP, and FPGA material, it will be necessary for the ACM tools to facilitate co-simulation with existing EDA environments. And for system-level verification, it will also be necessary to provide an emulation platform that allows developers to download ACM applications to a real device and verify their functionality in the context of the entire system.

As the legendary Dr. (Bones) McCoy might have said to Captain James T. Kirk, "It's EDA Jim, but not as we know it!"

Clive (Max) Maxfield is president of Techbites Interactive, a marketing consultancy firm specializing in high-tech. Co-author of the book "EDA: Where Electronics Begins," Max was once referred to as a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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