Hobbyist electronics rocks on
When I was but a young lad in England, I delighted in building the small electronic projects featured in hobbyist electronic magazines like Practical Electronics and Everyday Electronics. Following a series of EDA-style mergers, we ended up with a magazine called Everyday Practical Electronics (with Electronics Today International), which is a bit of a mouthful to say the least, so everyone calls it EPE for short. Similarly, in the case of the USA, the magazines Electronics Now and Popular Electronics exited stage left and were subsequently resurrected Phoenix-like in the form of Poptronics magazine.

Sad to relate, Poptronics now seems to have bitten the dust. There are rumors of the possibility of a web-delivered version of Poptronics, but delivering a quality web-based product is not as easy as one might think. I know this to my cost, because I've spend the last four years publishing the web-delivered version of EPE, which is known as EPE Online.

The reason I mention this here is that a big contributor to hobbyist electronics for longer than I care to remember has been the legendary Rudolf (Rudy) Graf. With more than 50 books to his credit, Rudy is certainly a force to be reckoned with, so I was delighted to have the chance to chat with him a few days ago. One of Rudy's current activities is his company, North Country Radio, which supplies a wide range of do-it-yourself electronic kits. I love this sort of thing, which is why Rudy's "Infrared Audio Transmitter and Receiver" kit is winging its way to me as I pen these words.

USBee LX digital test pod
In my previous column - "Logic Analyzer Gets Personal--" I introduced a product called the Ant8. Launched just a few weeks ago, the Ant8 is a tiny USB-based logic analyzer around the size of a box of matches and costing only $166 from RockyLogic. I was well impressed with the Ant8 (I now have one of my very own to play with). "What a jolly cunning idea," I thought ... but I should know by now that cunning ideas rarely venture out into the world in isolation -- they far prefer to travel in herds.

In fact, just a couple of weeks ago (on January 17th 2003), a company called CWAV introduced their USBee LX digital test pod, which also plugs into a USB port on your PC.

Figure 1 - The USBee LX digital test pod

Like the Ant8, the USBee LX is only the size of a small box of matches, but it provides a test laboratory's worth of test equipment, including Logic Analyzer, Signal Generator, Data Logger, Frequency Counter, and Remote Controller functions.

One really Cool Beans idea is that -- prior to actually spending any pf your hard-earned cash on this device -- you can download all of the software from CWAV's website. If you don't have a USBee LX physically plugged into your system, then the software will run in demo mode. Should you subsequently decide to invest in one of these little rapscallions, as soon as you plug it in the software will detect it and switch over into real-world mode.

Another really Cool Beans idea is that CWAV also supplies something called the USBee LX Tool Builder software, which allows you to create custom test tools for your USBee LX using Visual Basic or C++. The cost of one of these little rascals is $595. This obviously isn't chicken feed, but it also isn't bad considering that it replaces so much expensive test equipment.

PicoChip unveils working silicon
In my column from the beginning of December 2002 -- "PicoChip Offers Parallel Idea -" I talked about the rather cunning PicoArray devices being developed by PicoChip.

Well, I'm delighted to reveal that PicoChip has just sampled its first device, the PC101. This delivers a massive computational power of 30 Giga-MACs per second, which they claim is twenty times more than traditional devices despite needing only a fraction of the clock rate (160 MHz).

Figure 2-The PC101 PicoArray from PicoChip

The PC101 has a heterogeneous array of 430 16-bit processors on a single die interconnected by a fast deterministic fabric, which delivering 200 giga-instructions per second. These devices deliver the performance and efficiency of conventional, fixed-function System-on-Chip (SoC) implementations, but they are completely programmable using standard C or assembly language. Delivered in 528-pin CS BGA packages, these fully functional devices are currently being characterized for temperature, voltage, and burn-in.

Future Design Automation
A relatively new kid on the EDA block is Future Design Automation, which is leaping into the fray with what appears to be a very interesting ANSI-C to RTL Synthesis engine.

Today's incredibly complex digital designs typically feature mind-bogglingly sophisticated algorithms. These algorithms are first captured and verified at a high level of abstraction using a tool like Matlab. Once the algorithms have been proven, these floating-point representations are then hand-translated into their fixed-point equivalents in VHDL or Verilog at the RTL level of abstraction.

There are a number of problems with this conventional methodology. First of all the Matlab and RTL representations are conceptually far apart, which makes the hand translation time-consuming and difficult. Once the initial RTL has been generated, evaluating alternative architectures is also time-consuming and difficult. Simulating these designs takes forever (or at least it sometimes seems that way).

Even worse, the RTL has to be implementation-specific with regard to the target device architecture (the RTL intended for an ASIC implementation will be substantially different to the RTL that is to be realized as an FPGA). This means that if you are prototyping your algorithms in FPGAs, but subsequently intend to use hem in an ASIC, you may have to regress all the way back to the Matlab representations and start all over again - aaarrrrgggghhhh!

In order to answer this conundrum, Future Design Automation is introducing an architectural synthesis engine called DesignPrototyper (this is just one component of a tool suite called System Center). This synthesis engine accepts ANSI standard C and synthesizes it down into equivalent RTL. First of all you have to annotate the C source code with commented directives (pragmas) to specify things like bit-widths of ports, portions of the algorithms that need to be executed in parallel, and so forth. You can then use the engine to quickly perform evaluations on alternative architectures (such as unrolling loops, pipelining, resource allocation, retiming), eventually generating RTL that is targeted toward an ASIC or FPGA implementation.

Interestingly enough, following verification in Matlab, many design teams already generate a representation of their design in C. The Matlab and C representations are conceptually very close together, which makes life a lot easier, and the resulting C model simulates hundreds or thousands of times faster than its RTL equivalent. So if you've already got a C model of the design lying around, having the ability to synthesize it into RTL is "cream on the cake."

Of course there are a number of other players in this arena, including Cadence, Synopsys, Forte, CoWare, and Celoxica, so it will be interesting to see how this all plays out. For myself, I always like to see new EDA companies thrusting their way forward onto center stage, because they often have some great ideas that spur everyone else on to greater things. Should you actually get to play with the tools from Future Design Automation, please feel free to drop me a line and share your experiences ... who knows, they may form the basis for another column. Until next time, have a good one!

Clive (Max) Maxfield is president of Techbites Interactive, a marketing consultancy firm specializing in high-tech. Author of Bebop to the Boolean Boogie (An Unconventional Guide to Electronics) and co-author of EDA: Where Electronics Begins, Max was once referred to as a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way.