I was chatting with some of the folks at Vast Systems the other day about the way in which their tools can be used to create "virtual platforms" that allow embedded designers to develop software long before the silicon is ready. The first thing I discovered is that it's a mistake to enquire as to the origin of the name "Vast," because they will tell you in exquisite detail (and you really don't want to know trust me on this if nothing else).
Vast is an interesting company that was founded around five years ago by Graham Hellestrand, a professor of computer science and engineering at the University of New South Wales, Australia. Thus far, Vast has had relatively little exposure, because over the last few years they've largely been working in stealth mode developing some rather cool technology. But this may be set to change, because they've just won $6 million in funding, which means that they are now in a position to rend the veils asunder and tell the world what they've been doing.
The mind boggles!
I don't know about you, but my mind boggles when I look at how rapidly technology is evolving. Approximately 50% of chips had embedded processors in 2001, but Gartner Dataquest is predicting that this will rise to 75% by 2004. At the same time, the software content of products is ramping up dramatically.
The software associated with a 2G cellphone is said to account for approximately 20% of the design effort, but this increases to 65% for 2.5G cellphones and 80% for 3G phones. What this boils down to is that the software guys and gals need a platform upon which to test their capriciously cunning routines well in advance of the actual silicon arriving on their doorsteps.
There are of course a number of alternatives, including the use of hardware acceleration and emulation. Although these solutions are reasonably fast, the problem here is that the hardware portion of the design must be nearly complete before software development can start, which sort of defeats the object of the exercise. Furthermore, these hardware solutions are not particularly efficacious when it comes to architectural exploration.
Another option is to use a software-based instruction set simulator (ISS), but these are typically way too slow for any level of realistic software development. For a solution to be really useful to the software folks, it needs to allow them to develop and verify everything from the system initialization routines and hardware abstraction layer, through the real-time operating system (RTOS) and its associated device drivers, all the way up to the embedded application code itself.
If the system simulates at anything less than around 10 MIPS, then it's of no use for software developers in the context of an edit-compile-run-debug cycle, and even running on a modern, off-the-shelf, high-end PC, an ISS typically falls well below this level.
Comet and Meteor
And so we return to Vast, which has a pure software simulation solution that can be used to realize "virtual platforms" that allow embedded designers to develop software long before the silicon is ready. Vast's claim to fame is that that they have developed a revolutionary modeling technology with a "secret squirrel sauce."
This allows them to simulate entire SoC systems at an equivalent rate of 25-160 MIPS on a modern, high-end, off-the-shelf PC, which is 100-1000x the performance or a traditional ISS. (Vast told me that one of their customers had an internal C/C++ model that ran at approximately 10K cycles/second. This customer became an extremely happy camper when Vast replaced this model with their version, which ran at 28 million cycles/second!)
The really cool thing is that Vast's models are not just fast but accurate, because they provide cycle-accurate processor modeling and cycle-accurate bus modeling. This means that these models are fast and accurate enough to fully boot an RTOS (Windows CE in under a minute, for example), develop device drivers, and even develop real-time embedded application code.
Wrapped around the Vast models are two core products: Comet and Meteor. Comet is used by system architects in the early stages of the design process to create and analyze the virtual platform. This is where one performs architectural evaluation and analyzes performance considerations, such as cache sizing, looking at processor and bus capacity issues, and detecting resource sharing contention and synchronization issues.
Once the virtual platform has been locked down, Meteor comes into play for embedded software development. Of particular interest in these days of power-conscious designs is the fact that both Comet and Meteor can perform instantaneous power modeling. In the case of Comet, this allows system architects to evaluate tradeoffs between power, performance, and cost early in the design cycle.
Hardware/software co-design and co-verification was way harder when I was a young engineer. I wish we'd had tools like Comet and Meteor in those far-off-days (actually, when I come to think about it, I would have been happy if I'd just had access to a computer in those days of yore).
Having served my time creating models of several microprocessors, I'd love to know more about the techniques the folks at Vast have developed. Of course this is where they start to look smug and quickly change the topic of conversation, but I can't hold that against them, and will instead award them an official "Cool Beans."
Free SystemC training
If you're investigating language alternatives for high-level design, then before long you'll be knee-deep in the quagmire fighting your way through the myriad arguments for and against C/C++ versus SystemC. And of course we'll always have the VHDL, SystemVerilog, and Superlog supporters jumping up and down furiously waving their little "I love my (language of choice)" flags in the background.
But unless you're already an expert, the problem is where to go to learn enough about the various alternatives so as to be considered "dangerous." Well, things just became a tad easier in the case of SystemC, because Forte Design Systems recently announced that they are going to provide free introductory training for this little rapscallion.
This self-paced, comprehensive, online course will typically take around 4 to 6 hours to complete. In addition to being presented with a comparison between SystemC and C++, students will learn the syntax and usage of SystemC elements including channels, modules, data types, processes, and interfaces.
If you're interested, you can register on-line. And for those planning on attending this year's DAC, you can see a demo of this training at their booth (#1977) on June 2, 3 and 4, 2003.
Call me "old-fashioned" if you will, but this sounds like a pretty good deal to me ("what do you want for nothing, your money back?" as the old saying goes). Until next time, have a good one!
Clive (Max) Maxfield is president of Techbites Interactive, a marketing consultancy firm specializing in high-tech. Author of Bebop to the Boolean Boogie (An Unconventional Guide to Electronics) and co-author of EDA: Where Electronics Begins, Max was once referred to as a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way.