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Do-it-all FPGA design toolkit
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Every now and again you run into an idea that strikes you as being incredibly clever and cunning (and so obvious you wonder why you didn't think of it for yourself). One such concept is the recently announced Nexar product from Altium Ltd., which is one of the tastiest all-singing-all-dancing FPGA design solutions I personally have ever run across.

Now you may not have heard the name Altium before, but the history of this company is rather interesting. As fate would have it, Altium has been in EDA space for ages trading under the name of Protel International Limited. Way back in the early 1980s, a guy called Nick Martin living "Down Under" on the island of Tasmania (which is actually an Australian state and is known to many as "The Jewel of the South") needed tools to design printed circuit boards.

But such tools were jolly expensive at the time, so he designed his own. In 1985, Nick formed Protel, which subsequently became one of the major players in affordable off-the-shelf PCB design tools. In 2001 they adopted the Altium moniker (truth-to-tell I'm not sure why, but it may be that Protel was associated with PCBs and they wished to branch out into other EDA arenas).

Nexar leaps onto center stage

Let's leap right into the fray by stating that Altium's new Nexar offering — which was announced mid-November 2003 (a week or so ago as I pen these words) — is a complete hardware-software co-design and co-verification environment for FPGAs. Nexar is based on the fact that you can now purchase FPGAs containing 1+ million system gates for as little as $20. The entire environment is yours for only $7,995, which isn't chump-change, but when you see what you receive for your money I think you'll agree that it's quite a bargain.

First of all, this isn't one of those "bait-and-switch" offerings in which are obliged to purchase a seemingly endless list of "add-on extras" in order to obtain anything worth having. With Nexar, absolutely everything you need in the form of software, hardware, and intellectual property (IP) arrives as part of the base configuration in a shoebox-sized package.

On the software side, Nexar features an intuitive high-level environment that allows you to create, verify, and manage your designs. This includes a block-level graphical design capture system, simulation and synthesis capabilities, compilers and source-level debuggers...and the list goes on.

On the hardware side, Nexar includes a hardware development board that plugs into the back of your PC. Also provided are two daughter cards, one carrying a Spartan FPGA from Xilinx, while the other features a Cyclone FPGA from Altera.


Figure 1 — Nexar includes software and a hardware development board

With regards to IP, those clever guys and gals at Altium have created their own soft microprocessor cores. The initial Nexar offering includes a number of 8-bit cores that replicate the functionality of devices like the 8051, Z80, and PIC microcontrollers (over time, Altium plans on expanding its portfolio to include a range of 16-bit and 32-bit processor and DSP cores). These cores are accompanied by a library of standard peripheral devices, and all of this IP is provided royalty free.

Now is certainly possible for you to create your own RTL models (in VHDL) if you require, but one of the ideas behind Nexar is that a user should be able to create a design without having to be an expert with a hardware description language like VHDL. To this end, Nexar also includes a library of component blocks that are functionally equivalent to the 74-series of TTL devices.

Using Nexar

Perhaps the simplest way to understand how Nexar works is to walk through the process of creating a design. In this case you would probably start by initializing the environment at a high level, including activities such as selecting your target FPGA device. Having said this, however, you can easily migrate a design from one FPGA vendor/family to another at any time during the design process.

Next you would use the schematic system to capture your design as a collection of blocks and the interconnections between them. These blocks will primarily be one (or more) microprocessor cores and associated peripherals along with a collection of the 74-series type functions that are provided with Nexar. In this case, each of these royalty-free functions have been pre-synthesized and pre-verified, so the only task remaining for the environment is to generate a corresponding interconnect-level netlist. However, you can also include "black box" blocks in your schematic and populate these blocks with VHDL if you so desire. In this case, the synthesis engine provided with Nexar will automatically synthesize these blocks for you.

The above takes care of the hardware portion of the design, but what about the software? Well, right-mouse-clicking on one of the processor cores allows you to open up an editor allowing you to create (and later modify) the C/C++ source code that is to be run on that processor. This source code will subsequently be processed by one of the compilers that are bundled with Nexar. (And for all of you software gurus out there, Nexar also comes equipped with features like a small real-time operating system (RTOS) and a TCP/IP stack that you can include in your design if you so desire).

When you are ready to rock-and-roll, everything associated with the design — hardware and software — will be downloaded into the FPGA on the development board. In order to see what's happening in the hardware, you can include a variety of virtual instrument blocks in your schematic, including logic analyzers, frequency counters, frequency generators, and so forth.

And when it comes to working out what's happening in the software, as I said earlier, Nexar includes everything a young engineer's heart could desire. This includes powerful source-level debuggers (the actual debugger depends on the core you select) that allow you to perform all of the usual stuff that software guys and gals drool over like setting breakpoints, specifying watch expressions, single-stepping through code, stepping over or stepping into functions, and so forth (these debuggers can handle multiple processor cores on the same FPGA if required).

What really impressed me was when Nancy Eastman — the head honcho at Altium in the U.S.A — took time out of her busy schedule to visit me here in little old Huntsville, Alabama. Nancy bounded into my office (she has the most energy of anyone I ever met in EDA — and that's saying something) and proceeded to give me a hands-on demo that blew my socks off (note to self, wear elasticated socks the next time Nancy is in town).

Anyway, to cut a long story short, Nexar is the perfect solution for its targeted class of design problem, and it receives a hearty "Cool Beans" from me. Until next time, have a good one!

Clive (Max) Maxfield is president of Techbites Interactive, a marketing consultancy firm specializing in high-tech. Author of Bebop to the Boolean Boogie (An Unconventional Guide to Electronics) and co-author of EDA: Where Electronics Begins, Max was once referred to as a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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