Before going into detail on the specifics, it's useful to spend a little time on their origins. The problems we are currently experiencing are the result of poorly designed packages. The packages housing FPGA devices receive very little attention and are produced at the cheapest price possible.

The focus has been, and still is, on packing the most functionality into a single package for the lowest cost. In many instances, the packages are designed by third-party design groups and delivered through third-party suppliers.

This has occurred in much the same way that we saw earlier problems with IC packages such as quad flat packs. Early CMOS and TTL parts were slow enough that package parasitics had little effect on performance. Similarly, logic functionality was mostly a function of truth-table execution accuracy.

No testing with evaluation circuits was required of a manufacturer — they just had to make sure the part properly executed its logic function, and then they started selling the design. This allowed many companies unfamiliar with the electrical engineering side of logic to get into the device business. (ECL manufacturers, the providers of the high-speed logic of earlier times, did not use this simple model.)

The march of technology has made it easy to design CMOS parts with speeds as fast as any ECL device. Unfortunately, as device speeds have gone up there has also been an increase in the problems occurring from device package lead inductances.

Specifically, unwanted inductance in the power paths into and out of the device packages creates Vcc and ground bounce (also referred to as simultaneous switching noise, SSN). Failures from SSN are manifested infrequently, so it is often difficult to trace their cause back to faulty packages.

This matter is further complicated because the device manufacturers don't provide any data on the package specifics. By the time the failure is traced back to the package, there is nothing that can be done to fix the problem either on the device itself or the PCB onto which it is mounted.

Next month: What can be done with system designs to address FPGA package problems.

Lee Ritchey is the founder and president of Speeding Edge, a leading industry training and consulting firm specializing in the high-speed PCB and system design disciplines.