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Where C design fits
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EE Times


GOERING_RICHARD

As we head for March conferences such as DATE, HDLCon and the Synopsys Users Group (SNUG), the C language design debate is likely to rear its ugly head. But emotions and vendor posturing may obscure the real role of C-language design, which is not what most designers think.

Judging from postings in the E-Mail Synopsys Users Group (ESNUG), many RTL designers seem to think there's an evil conspiracy of vendors and CAD managers to take away Verilog and force a move to C/C++. If there is, it won't work. If today's RTL ASIC designers need a higher level of abstraction, Superlog makes far more sense than C/C++, at least for Verilog users.

The point that may often be missed is that C/C++ language design is already in widespread use today. It's being used by many major electronics manufacturers, particularly in Europe, for system-level modeling and silicon intellectual property (IP) design. In this sense, C language design is an old methodology, not a new one.

Most of these companies, however, use their own proprietary C/C++ class libraries, making IP exchange very difficult. That's where SystemC comes in. One standardized library will allow companies to mix and match C language IP from different sources. SystemC is really about IP modeling, not forcing RTL designers into a new methodology.

Another legitimate place for C language tools is to ease the gap between C and HDL models. Today, there usually needs to be a complete rewrite. Any way to automate the translation process will help.

C language models can also help speed RTL simulation. There's always been an ability to bring in C language models through the Verilog programming language interface (PLI), but some vendors are looking at more efficient ways to create this link. C/C++ language approaches to testbench generation, such as Cadence Design Systems' TestBuilder library, may also appeal to some designers.

C is not going to replace Verilog for ASIC design, but who says we're going to design ASICs forever? I suspect that an increasing number of high-volume, fast time-to-market applications will be based on programmable or reconfigurable architectures.

This is where C language design can really shine. In the ultimate design system, you wouldn't even care what goes into hardware or software-you'd just write C/C++ code, and everything else would happen "under the hood." A C compiler that's intelligent enough to do all this would be a great prize indeed.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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