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Two paths to standards
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GOERING_RICHARDThe current battle over assertion language standards underlies a deeper philosophical division over how to approach EDA standards. One camp advocates open-source standards under vendor control, while the other supports broad standards organizations, such as Accellera or the Silicon Integration Initiative (Si2).

Accellera is working on two related initiatives for assertion language standards. One will select a formal property language, while the other will add an assertion construct to Verilog, probably based on the Superlog Design Assertion Subset. This will be included in this year's System Verilog release.

Synopsys and Intel, meanwhile, are pushing OpenVera 2.0, which adds Intel's ForSpec formal-property language to Vera. It's freely available now under an open-source license, although Synopsys has final say over the language reference manual.

Another broad-based standards effort is the OpenAccess Community, spearheaded by Si2. Here, the goal is an industry-standard data model and application programming interface, with Cadence Design Systems Inc.'s Genesis database as the reference implementation. Cadence will give full control to the community but will retain some veto power until July 2004.

Here again, Synopsys is not on board. That company is talking about Avanti's Milkyway as its preferred database, and it remains to be seen how open Milkyway will be, and to whom.

The Synopsys viewpoint appears to be that established standards bodies are slow, ineffective and politicized. If there's a de facto standard, the argument goes, why not just put it out there under open source? New standards proposals are trickier. Synopsys eventually gave up control over SystemC, but not without a lot of loud complaints from competitors.

Accellera and Si2 will argue that broad-based, nonpartisan standards bodies provide a surer route to adoption than vendor-controlled efforts. They say all control should ultimately be given to an organization that anyone can join.

In an admittedly unscientific poll on EEdesign, an online EE Times community, respondents favored the Accellera assertion approach over OpenVera 2.0. One reason may be skepticism about Synopsys control over OpenVera. Another may be that adding an assertion construct to Verilog seems simpler than learning a formal property language.

Yet, OpenVera 2.0 offers at least one compelling advantage-you can go to www.open-vera.com and use it today.

Designers will ultimately use what's available and what works. Whoever can best provide that will set the standard.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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