Yet, I'm not seeing a lot of announcements that appear to be technology breakthroughs. Maybe this will be a quiet DAC, though I'm sure the Synopsys-Avanti merger will fuel talk in the aisles.

Possibly the most significant announcement I've seen thus far is Synopsys Inc.'s Floorplan Compiler. I say that based not on any judgment about the technology, which, of course, has yet to be proven in the field. What's important is that Synopsys is seeking to reclaim a vital market it has lost: RTL design planning, or "silicon virtual prototyping." That's the linchpin of the RTL-to-GDSII design flow, and if Synopsys succeeds, it could potentially own the entire "power user" chip design flow.

Given that Floorplan Compiler is the successor to the widely disliked Chip Architect, it may be a challenge. Cadence Design Systems Inc. will certainly work hard to keep its dominance in that market, acquired along with Silicon Perspective Corp., whose First Encounter largely displaced Chip Architect.

A number of other vendors are bringing out RTL design-planning solutions at DAC, including Atrenta, Icinergy, InTime, Magma Design Automation and Tera Systems. Those vendors face the task of competing with Cadence and Synopsys in a crowded field.

In verification, several are moving toward the "intelligent testbench" described by Dataquest's Gary Smith. One is Synopsys, whose VCS 7.0 release brings in assertions, a new subset of Vera and CycleC modeling technology. Co-Design Automation Inc. is bringing automated testbench features to SystemSim 2.0, and Cadence supports Accellera's Sugar 2.0 assertion-language standard.

Novas Software has a new twist with its behavioral-based debugging technology. Axis, Quickturn and Tharas are offering greatly expanded capacity for hardware-assisted verification.

One thing we're not seeing much of is system-level or C-language design. There are a few, but not many, announcements in synthesis, placement and routing. There are, however, several vendors offering new RF design solutions.

Maybe what will be most interesting about DAC 2002 isn't so much products, but panels and discussions about assertion languages, interoperability and other key issues. Stay tuned to www.EEdesign.com for daily updates.