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The battle over BIST
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EE Times


GOERING_RICHARDGet ready for a marketing war over built-in self test (BIST) that will include debates over what this term actually means. At issue is whether on-chip compression techniques present advantages over more traditional BIST architectures and whether they're really BIST or just another variety of automatic test pattern generation (ATPG).

In an October exclusive feature at our EEdesign site, "New approach moves logic BIST into mainstream," Synopsys authors argued for a new "deterministic" logic BIST methodology. This approach uses the BIST architecture as a decompression/compression engine to apply deterministic test patterns. Traditional BIST, in contrast, uses a pseudo-random pattern generator (PRPG) to generate inputs to scan chains.

Older BIST approaches, these authors say, suffer from high area overhead, inability to diagnose problems and low coverage. The new approach, they said, reduces test data volume and test application time.

But is this new approach even BIST? In a December EEdesign feature, "BIST vs. ATPG-separating myths from reality," LogicVision's Stephen Pateras notes that much has been written about "on-chip compression of ATPG." He said that these new techniques, "some oddly named using the term BIST," improve on traditional ATPG solutions but still fall short in addressing "real testing needs."

Pateras shows how the new decompression/compression approaches differ from true BIST, which uses PRPG techniques, and he said that BIST provides better coverage and true at-speed testing, while scaling with increasing chip sizes.

Behind these differing claims is a battle over market share. The latest Market Trends report from Gartner/Dataquest states that the BIST market grew by 78 percent in 2001 and will reach $63 million by 2005. ATPG shrank by 20 percent in 2001 and will hit $27 million by 2005.

LogicVision held 72 percent of the BIST market in 2001, Synopsys held 91 percent of scan, and Mentor Graphics claimed 61 percent of ATPG, with Synopsys at 31 percent. Synopsys still leads in overall design-for-test, albeit with a shrinking share. LogicVision doubled its share in 2001, and Mentor and Fluence Technology also gained, the report states.

It certainly appears that design-for-test is extremely competitive and that BIST has become the place to be. Designers will need to sort through differing claims as the battle of BIST heats up.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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