Much of the news about EDA has been gloomy of late. You've read about lawsuits, revenue shortfalls, missing capabilities and user complaints about tools. Perhaps it's time, as we head into the 40th Design Automation Conference (DAC) this week, to look at what's right about the electronic design automation industry.

The first good news is that EDA product and maintenance revenues were down by 3 percent last year. Good news? Well, compare that figure with the rest of the high-tech industry. Most of the semiconductor and systems companies who buy EDA tools were down far more than 3 percent in 2001.

Synopsys' second fiscal quarter results, announced May 21, were impressive. The year-to-year 57 percent revenue gain can be attributed largely to last year's Avanti acquisition, but the company beat Wall Street earnings estimates and set forth optimistic guidance for the rest of the year. It could be a sign of a turnaround.

On the technology side, real efforts are being made to grapple with the problems of 130- and 90-nanometer design. This week's Taiwan Semiconductor Manufacturing Co. Ltd. reference flow announcement, in cooperation with Cadence Design Systems Inc. and Synopsys Inc., is a sign that EDA technology is moving forward along with silicon.

At DAC we'll see new technology in such areas as electronic system-level design, formal verification, power management and design-for-yield. Even in these challenging times, startups are springing up and getting funding. Recent examples include Jasper Design Automation, AccelChip and CiraNova.

And, standards are moving ahead. We probably won't get a single database for chip design, but at least OpenAccess and Milkyway will communicate.

Designers complain about EDA, often for good reasons. But they couldn't get along without it. Maybe it's time for an EDA Appreciation Day in which we think about the things in our lives that would not exist were it not for EDA.

Richard Goering is managing editor of Design Automation for EE Times.

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