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The battle for logic synthesis
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EE Times


GOERING_RICHARDCan Synopsys maintain its historic near-monopoly in logic synthesis? Maybe, but the company will have to work hard for it, if postings in a recent Synopsys Users Group (SNUG) trip report are any indication.

The report, a survey of 148 engineers, includes detailed reviews of tools from Synopsys and its competitors. Postings from engineers show that some are using, or considering, alternatives to Synopsys' Design Compiler product. But Synopsys is fighting back with an upcoming release, code-named Nighthawk, that is getting good reviews thus far.

Several engineers contributed positive reviews of such Design Compiler competitors as Cadence Design Systems' Ambit and Get2Chip tools, Magma Design Automation's Blast Chip, and Synplicity's Synplify ASIC. Some said those competing products are faster and use less memory.

One posting spoke of "horrific" run-times for Design Compiler compared with Get2Chip and Synplify ASIC. "Synthesis has definitely become a commodity, and Synopsys has a lot of work to do if they want to stay on top," said the author.

Synopsys has attained a 20 to 30 percent run-time improvement with the new Design Compiler 2003.12 release, according to several engineers. But several postings said 2003.12 causes more timing violations and has bugs.

What's getting good reviews is the beta version of Design Compiler 2004.06, also known as Nighthawk. Reviewers said Nighthawk is significantly faster, consumes less memory and has good timing results. One spoke of a threefold speed increase, 3.5x reduction in memory and 23 percent improvement in area compared with previous releases.

Similarly, users noted a speed improvement in Physical Compiler 2003.12, although one reviewer said that the version is buggy.

Another engineer lauded Physical Compiler 2004.06, saying it doubles capacity and runs 500,000 instances overnight.

Physical Compiler faces competition from Cadence, Magma and newcomer Sierra Design Automation.

Somehow, Synopsys has consistently managed to keep something close to a 90 percent market share in logic synthesis, despite competitive challenges. But competition is heating up, engineers are looking at alternatives and Synopsys has taken a tumble in the financial world after poor quarterly results.

The Synopsys label alone is not enough. Maintaining a lead in run-times, memory usage and quality of results is crucial.

It looks like Nighthawk could prove to be a critical release for the future of the company.

Richard Goering is managing editor of Design Automation for EE Times.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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