Just don't expect to stick out your elbows. EDA revenues are only around $4 billion a year, and they aren't growing. There are more than 200 companies in the business, and several dozen startups emerge every year — yet the three biggest players still claim around 80 percent of total EDA revenues.

Electronic-system-level design has been a hot area for startups, but there are so many entries now that marketplace confusion is more likely than widespread adoption. ESL point tools are many, but flows that can go from concept to implementation are few. Design-for-manufacturing is also attracting a lot of startups, but how large is this market, and how profitable can it be? Startups in this area will also find themselves increasingly competing with the big EDA vendors.

Still, there are problems out there that have gone begging for solutions. One is IC package and pc-board co-design. In recent PCB Perspectives columns in EE Times, Lee Ritchey has shown how poor IC and FPGA packaging is causing such problems as simultaneous switching noise and ground bounce. Reader response has been strong, showing that packaging is a real problem for a lot of designers.

In an ICCAD panel discussion last week (see story, this page), Steve Teig, CEO of semiconductor startup Tabula, suggested that tools for systems-in-package might fuel a good startup. SiPs may be a better way than systems-on-chip to implement mixed-signal or RF circuitry, but tools are lacking.

Another suggestion from the same panel was a tool that could automate custom-IC design. Two words come to mind here: silicon compilers. When first tried in the 1980s, silicon compilers were ahead of their time. Perhaps it's time to revisit the concept.

Prediction and analysis tools that enable RTL signoff are another possible area for startups, given that many design teams won't want to do physical design beyond 90 nanometers. Such tools will help make ESL practical, and they'll need to incorporate DFM.

The problems everyone is talking about aren't the only ones to solve.

Richard Goering is managing editor of Design Automation for EE Times.