Historically, semiconductor devices were developed to perform a single, well-understood function. Those containing a processor were designed to provide the processor with everything needed to perform that single function. We have now moved fully into an era in which chips are complete systems--the era of the system-on-chip. Today, multiple processors or similar complex functional blocks must interact internally and with the real world to provide the system capabilities demanded by the consumer's voracious appetite for electronic products.

We are at a crossroads in the semiconductor industry, where the difficulty in meeting chip design deadlines is not a lack of proper skills or mature EDA tools, but rather a more insidious demon.

The leaders in our industry have perhaps the best talent in the world and the resources to equip them with best-in-class tools. Despite this, designers continue to miss their scheduled design targets, resulting in high development costs and lost profits because they cannot meet ever-shortening consumer market windows. The move from single-function chip design to SoCs requires an altogether new approach that will provide a predictable path from system-level architecture through all the steps of implementation, enabling the development of designs within predictable schedules.

Designing multifunction systems demands an understanding of the interactions of the individual functions and the impact of those interactions on the overall chip requirements. While there are well-proven methods for specifying, designing and testing individual functions, these do not extend to system-level design. The challenge, and the source of unpredictability, is that a multifunction system requires the correct balance among the competing demands of the individual functions. What is lacking in conventional methodologies is a way to express the interactions of these functions and the impact of those interactions on the requisite communications among those functions on the chip. Compounding the competing interactions, communication requirements have exploded with the advent of high-definition video, surround sound audio, broadband data demands and so forth.

What is needed is a methodology and accompanying tools that invoke an industry shift similar to the move from gate-level tools, mainly schematics, to language-based descriptions of functions at the register transfer level (RTL). Such a transition would move the industry from an individual-function orientation to a system orientation. This move must provide a means for describing both the connectivity of the functions and their competing interactions with critical shared resources.

In a manner similar to RTL synthesis tools, the tools for system-level specification, analysis and implementation must be based on details of underlying technology-specific implementation. This will provide the system-level designer with a predictable way of making decisions about the interactions of the functional blocks being integrated. Providing this predictability to the whole design team will eliminate the possibility of expensive surprises in the late stages of design.

Considering the complexities and variability of deep submicron processes, it is a recipe for disaster to wait until the chip is fully integrated to determine whether the functional blocks operate together as a system. This is evidenced by the fact that more than 85 percent of all chip designs are delivered substantially late.

Imagine the benefits of being able to describe system interactions when a high-definition decoder needs 2.4 Gbytes/second of bandwidth to DRAM, a display processor needs 1.2 Gbytes/s of bandwidth to the same DRAM, and the control processor, audio subsystem and human interface functions are all active at the same time. Couple this with the physical attributes of each of the functional blocks, and you have a system that synthesizes the correct communications infrastructure from the requirements, putting you at the doorstep of "system synthesis."

This is the SoC design that is needed by the industry today.

David P. Lautzenheiser is vice president of marketing at Silistix Inc. (San Jose, Calif.).