Berkeley, Calif. -- Much of today's research in computer design lacks a clear direction at a time when computer architecture is on the cusp of a historic shift to a multicore approach. Meanwhile, much of the key funding for semiconductor research is going into so-called "CMOS killers"--technologies that likely will be absorbed into CMOS rather than supplant it.

Those were two of the more contrarian opinions voiced by researchers at the University of California at Berkeley, who rolled out their visions and their latest projects in a daylong program here last week.

Separately, one academic called for a new class of wireless routers based on cognitive radios and a high-level operating system to untangle today's home networks. Others said they are working on new tools to help develop software that is more secure and free of bugs.

In computing, software and hardware developers are headed in opposite directions in separate ef- forts to define tomorrow's parallel systems and software, said David A. Patterson, professor of computer science at Berkeley. Hardware researchers are focused on tightly coupled, thread-level parallelism, while most of the key software is moving toward data-level parallelism.

"We desperately need a new microprocessor architecture focused on parallel computing" to help bring the two together, said Patterson, who co-developed one of the first RISC CPUs.

Responding to the challenge, Patterson is leading a new project called Research Accelerator for Multiple Processors. RAMP plans to deliver late next year an FPGA-based system that could emulate different instruction sets and styles of parallelism.

"We want to preview the computer of the future for software developers," said Patterson. "This could be the equivalent of what the VAX and Berkeley Unix [combination] was in the 1980s--and we need it yesterday."

The RAMP systems could spawn a wealth of research papers. They could, for example, help researchers gauge whether data- or thread-level parallelism is a better approach. "With this tool, people could make head-to-head comparisons of different parallel architectures more easily," Patterson said.

RAMP got its start in hallway discussions at a computer architecture conference last summer. Now, tech execs at Hewlett-Packard, IBM, Intel, Microsoft and Sun have signed up to participate, as have researchers at six universities including the Massachusetts Institute of Technology and Stanford.

The project aims to deliver, by the end of 2007, a $100,000 system that provides a thousand 64-bit CPUs linked via a cache-coherent interconnect that could be programmed to run various instruction sets. It would let developers trace operations as they run standard operating systems and database programs.

Prototype coming
The Berkeley researchers plan to finish a prototype by the end of this year using 1,000 Xilinx MicroBlaze CPU cores. The RAMP group is now negotiating with IBM Corp. and Sun Microsystems Inc. to get access to 64-bit Power and Sparc cores for the 2007 version of the system.

A Berkeley graduate student has already made some progress in defining a kind of hardware scripting language that could provide some of the underpinnings of the system interconnect. Initial prototypes of RAMP are based on an existing 22-layer printed-circuit board using five Xilinx Virtex-II FPGAs with eight boards gathered into an 8U rack system.

Perhaps the biggest challenge facing the project is to get adequate funding. "This is our third job, after teaching and research, and we don't have direct funding to do it," said Patterson. "That's one of our main challenges, and it may be a harder job than we think."

As tomorrow's computers shift from traditional single-processor systems, semiconductors are likely to stick with tried-and-true CMOS--even though many major chip R&D programs are focusing on new horizons such as nanotechnology, said Chenming Hu, professor of electrical engineering at Berkeley.

"Funding today has a lopsided focus on CMOS killers. What's propelled this industry's success is incremental advancements in today's technology, but that's being pushed aside by the elusive pursuit of something new," said Hu, the former chief technology officer of Taiwan Semiconductor Manufacturing Co.