The donation includes power management commands, SystemVerilog constructs, VHDL constructs and the Switching Activity Interchange Format (SAIF), Synopsys (Mountain View, Calif.) said.

Synopsys was among several companies that offered to contribute technology at a UPF technical subcommittee kickoff meeting held last week in Santa Clara, Calif. Offers of technology also came from Mentor Graphics Corp., Magma Design Automation Inc. and Sun Microsystems Inc.

UPF is one of two power standards efforts currently in motion. No. 1 EDA vendor Cadence Design Systems Inc. is pushing its own Common Power Format (CPF), which it has said is past the Accellera development stage and ready to go to IEEE for standardization now.

A number of companies balked when Cadence initially said other EDA vendors would not be able to contribute technology to CPF. Unease over the way Cadence was proceeding with CPF led to a meeting of EDA vendors and users, led by Texas Instruments and Nokia, at the Design Automation Conference in July, That meeting led to the creation of Accellera's UPF.

Cadence has since opened the door for other EDA vendors to participate in its Power Forward Initiative. Several joined the movement earlier this month. But the other members of EDA's "big three" —Synopsys and Mentor— as well as No. 4 vendor Magma, have sided with the UPF effort.

The UPF technical subcommittee has outlined an aggressive schedule calling for a first draft for review by Oct. 30, a draft for Accellera review by Nov. 30, and a handoff to the IEEE or another standards body by Jan. 31, 2007. The window for donations will be open past an Oct. 5 meeting called by Accellera and the Silicon Integration Initiative (Si2) to get user input on power standards.

In a statement issued by Synopsys Monday, Shrenik Mehta, Accellera chair, praised the company for its contribution.

"Many customers worldwide utilize Synopsys' low power technology to produce their most advanced low power designs," said Rich Goldman, Synopsys vice president of strategic market development. "By contributing our technology to the Accellera Unified Power Format technical subcommittee, Synopsys demonstrates its dedication to allow all designers and EDA suppliers to utilize its proven technology as a comprehensive standard for low power design."