San Jose, Calif. - EDA startup ACAD Corp. will announce this week a hybrid tool that incorporates transistor-level simulation analysis capabilities for mixed digital and analog designs.
Andrew Huang, ACAD's president and CEO, said competing tools from companies such as Synopsys Inc. and Nassda Inc. represent older generations of Spice technology. ACAD's FineSim tool is third-generation technology focused on "big A, little D" designs-those with more analog than digital circuitry, said Huang. "One of the common themes we hear from top-10 customers is that their designs are leaning toward analog," he said. "The frequency and clock speeds are increasing and process geometries are shrinking."
The demand for accuracy in analog-intensive designs usually means snail-paced run-times and tiny capacity. "Our engine is much more accurate than other turbo-Spice simulators," said Huang, and is also faster.
FineSim incorporates an accurate full-chip transistor-level fast Spice simulation algorithm. The engine in default mode targets accuracy first; ACAD sells optional speed cards. "We can change the partition size and change the algorithm to speed up the engine," Huang said. Capacity is limited only by the memory of the workstation Fine-Sim runs on, he said.
An upcoming optional add-on module is an embedded engine for Verilog and VHDL. It will be released at the Design Automation Conference in San Diego next month. Another module adds algorithms for nonideal power analysis and dynamic RC reduction, which customers use when working with signal and power nets. It too will roll out at DAC. One FineSim customer used that tool for postlayout nonideal power simulation analysis and found that it delivered correct Spice-like results 10 times faster than other fast Spice engines, Huang said.
FineSim is available now, with time-based licenses starting at $75,000 per year.