At present, the IC industry is moving towards the 45-nm node and beyond in what could be called the ''nano-scaling'' era. In this era, a 300-mm fab runs $2.5-to-$2.9 billion, while the development costs for a 45-nm process is about $1.1 billion, said Oh-Hyun Kwon, president of System LSI Business at Samsung.

Fabs and process technologies simply ''cost too much,'' Kwon said during a keynote address at the Design Automation Conference (DAC) here on Tuesday (June 5).

Still, the industry continues to move down Moore's Law. This will require new breakthroughs ''and standards in equipment and materials,'' he said.

It will also require a new class of EDA tools. During the keynote, he urged EDA vendors to develop the following technologies:

*Faster simulation tools.

*Standard interfaces between the process and design in IC layout.

*Co-development and tools in IC packaging.

*Breakthroughs in developing accurate models for mask and lithography development.

*An advanced abstraction methodology to interface with the entire hierarchy.