SAN JOSE, Calif. — Startup MetaRAM comes out of stealth mode Monday (Feb. 25) with a chip set that can double or quadruple the capacity on a dual in-line memory module without moving to more expensive DRAM chips. The chip set arrives at a time when Intel Corp. is moving toward embracing a mix of fully-buffered and registered DIMMs, expanding the available market for the startup.

Smart Modular said it will ship an 8 Gbyte DIMM for $1,500 using the new MetaRAM chip set and Gbit DRAMs, slashing costs on a device otherwise priced up to $5,000. Korea's Hynix also agreed to use the chip set which can support stacks of up to four die on a DRAM chip.

At the high end of PC servers, users will be able to pack 256 Gbytes RAM in four-socket server for $50,000, about a tenth the current cost. An eight-way system could pack as much as a terabyte of main memory using quad-core DRAM chips.

The start-up aims to help system makers build memory subsystems that keep pace with the rapid progress in microprocessors. The new capacity could help high-end modeling applications pack an entire database into main memory, significantly boosting performance.

"We are going after the memory capacity gap," said Fred Weber, chief executive and co-founder of MetaRAM. "There is a lot of excitement about putting a whole database in main memory and we are playing into that well," he added.

"Through a kind of virtualization we can deliver the equivalent of a DRAM density two generations ahead," said Weber, former chief technology officer at Advanced Micro Devices.

MetaRAM has developed access and flow control chips that effectively create a dual-bus link between a memory controller and expanded banks of DRAM chips. The chip set keeps DRAM die in sleep mode until they are needed by the system controller, opening the door to quadrupling the number of memory chips on a DIMM while staying within the existing thermal envelope.

The chip set introduces two clock cycles—or about six nanoseconds—of latency. That will create no more than a two percent performance hit for a typical server with at least 125 ns system-wide latency, Weber said.

"It's hard to benchmark the performance of this, but if it is a matter of getting a whole modeling database in main memory it's huge," said Weber. "We have this running in systems and under full formal verification," he said.

DRAM makers routinely use two cores stacked in a chip today and are beginning to experiment with four-core stacks, Weber noted.

A six chip set for 8 Gbyte DIMMs based on dual-core Gbit DDR2 chips costs $200. An eleven chip set for a 16 Gbyte DIMM using quad-core DRAM chips costs $450. The chips are made in 180nm technology at TSMC, in part to hold down costs and mate well with 1.8V DIMM power requirements.

The company is working on a version for DDR3 chips. It will likely ship by the time DDR3 DRAMs ramp, probably in 2009.

"I wanted to hit mature technology with the first product," said Weber.

It is unclear whether other big DRAM makers such as Samsung and Micron will adopt the MetaRAM approach. The technology potentially helps them sell more mainstream chips for a higher price point. However, it could also cut into sales for their emerging next-generation chips.