United Business Media EE Times


Search

HOMELATEST NEWSSEMICONDUCTORSMOST POPULARMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSS

 


Lab-on-chip design automation takes cue from EDA
Print this article Email this article Reprints RSS Digital Edition

Page 1 of 2
EE Times


PORTLAND, Ore. — Algorithms developed by a range of research groups aim to automate microfluidic lab-on-chip technologies that perform chemical identification and medical tests by shuffling nanoliters of samples and reagents around micron-sized channels. Besides shortening the time required to analyze such small sample sizes, automation enables many more lab tests to be performed on chip.

The initial algorithms were hand-crafted for various lab-on-chip prototypes. But according to presentations at the International Symposium on Physical Design (ISPD), researchers have begun adapting EDA techniques to automate the design and operation of microfluidic labs-on-chip.

"We have automated place-and-route algorithms for microfluidic chips that afford a tenfold reduction in design time over hand-tuned place and route," Tamal Mukherjee, a professor at Carnegie Mellon University (Pittsburgh), said in his ISPD presentation.

Besides Carnegie Mellon, research institutions working on microfluidic labs-on-chip—and devising computer-aided techniques to design them—include Duke University, National Taiwan University (Taipei), Oak Ridge National Laboratory (ORNL, Kentucky), Penn State University (Harrisburg), Rensselaer Polytechnic Institute (Troy, N.Y.), the University of Alberta (Canada), the University of California at Los Angeles and the University of Texas (Austin).

There is no simple translation methodology from traditional place-and-route algorithms for interconnecting electronic devices to place-and-route algorithms for interconnecting the channels and reservoirs on microfluidic chips. For one thing, interconnections on electronic chips and on microfluidic chips follow different rules. For instance, if two lines would intersect on electronic chips, then two vias are necessary to prevent shorts: one to route the line up a layer and over the intersecting line, and another to route the line back down to the original layer so it can continue on its way. By contrast, "we can route microfluidic chips without the need for vias, because channels can cross without shorts, as long as fluids don't cross the intersection at the same time," said Duke University professor Krishnendu Chakrabarty said at ISPD. "It's like traffic at an intersection."

The other major problem to be solved for creating microfluidic algorithms is a lack of standardization. Electronic chips have unique variations, but at least they are composed of the same sorts of components: transistors, capacitors, resistors and subsystems like timers, shift-registers, arithmetic-logic units and their kin. Microfluidic chips, on the other hand, have yet to standardize on a set of common building blocks.

University researchers are cataloging the types of components needed for labs-on-chip as a first step toward standardizing on a common set.

"At Duke, we are designing a set of micropumps, microvalves and other subsystems, such as the kinds of channels needed for electrokineticism [moving fluids by attraction to and repulsion from electrical signals]," said Chakrabarty. "Then, by permanently etching microchannels between these subsytems, we hope to create a microfluidic state machine."

Electronic state machines simplify the logic synthesis step of designing semiconductor chips, and likewise a microfluidic state machine could simplify the synthesis of algorithms for performing operations with a fluid processor. Once the required number of permanently etched microchannels, micropumps, microvalves and other subsystems is determined, then place-and-route algorithms could automatically perform the physical layout of a microfluidic chip.

"Many of the same problems need to be solved for place-and-route algorithms for microfluidic chips as for semiconductor chips," said Chakrabarty. "For instance, at Duke, we have invented sophisticated algorithms for assigning I/O [input/output lines for piping fluids onto and off-of microfluidic chips] that uses the minimum number of necessary I/O lines without any collisions."



Page 2: 'General purpose' microfluidics

Page 1 2

Related Links:

  • Microfluidics is beginning to clear the lab
  • Bubble memory gives way to bubble logic
  • Battery-powered lab-on-chip may be near
  • Lab-on-a-chip enables quick test for avian flu



  •   Free Subscription to EE Times
    First Name Last Name
    Company Name Title
    Email address
      Click here for your Free Subscription to EETimes Europe
     
    CAREER CENTER
    Looking for a new job?
    SEARCH JOBS
    SPONSOR

    RECENT JOB POSTINGS
    CAREER NEWS
    SRC Expands R&D Centers
    The Semiconductor Research Corp has added a new center to its university R&D efforts.

    For more great jobs, career related news, features and services, please visit EETimes' Career Center.



    All White Papers »   

     
    Education and
    Learning


    Learn Now:












    Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
    Network Websites
    International
    Network Features




    All materials on this site Copyright © 2009 TechInsights, a Division of United Business Media LLC All rights reserved.
    Privacy Statement | Terms of Service | About