Gavrielov, though, had the good sense to couch this remark with the tongue-in-cheek observation that he is sure that journalists and analysts in the room had heard basically the same thing at least once per year from each of the industry's two dominant FPGA houses.

It's true that Xilinx and its chief competitor, Altera Corp., have been saying for years that there are a growing number of compelling reasons for using FPGAs instead of ASICs or ASSPs. But Gavrielov argues that a combination of market forces, economic factors and technological innovations made by programmable devices in recent times have given this argument new weight.

Gavrielov isn't predicted doomsday for ASICs. But he does make the case that ASICs are being relegated to specialized, high-volume applications and being displaced in most other areas by FPGAs. He maintains that what he calls the "programmable imperative" is being mandated by business conditions, chiefly the growing non-reoccurring engineering investment required to support traditional ASICs.

Citing data provided by foundry Chartered Semiconductor Manufacturing and EDA vendor Synopsys Inc., Gavrielov said the combination of design, photomask and yield ramp-up costs at the 45-nm exceeds on average $60 million per product. This average will grow to $100 million per product at 32-nm, including $12 million in photomask costs alone, he said. These costs have been blamed for a well-documented reduction in overall IC design starts throughout the industry.

"There are less [ASICs] and they are all trying to hit home runs because they have to justify the investment," Gavrielov said.

Meanwhile, according to Gavrielov, today's advanced FPGAs—including the Virtex-6 and Spartan-6 families introduced by Xilinx Monday (Feb. 2)—deliver the performance, cost, power-consumption and capability that at one time could only be met by custom ICs or ASSPs.