Dolphin Integration claimed that the configuration of its I-Stratus-LP can be dynamically and automatically configured so as to ensure "the lowest power consumption while its implementation grants a minimized impact on the speed of the system."

The French company specified that the power reduction can be reduced up to four times compared to an usual cache controller and up to eight times compared to a system —MCU+Memory— without cache memory.

Moving to processing power, the company said the system is no longer limited by the access time of the background memory. The frequency is close to the MCU frequency targeted.

Dolphin Integration also put an emphasis on the I-Stratus-LP cache controller ability to self-adapt its configuration to the application program content.

Hence, one Stratus cache controller suits multiple SoC requirements and any application program, and there is no need to acquire some specific knowledge on how to configure a cache controller. Similarly, there is no need to wait for the application program for configuring the best cache solution, Dolphin Integration concluded.