Intel's new and surprising lithography roadmap indicates that EUV will not be ready for production until 2009, and confirms previous reports on SBN that 157-nm tools will not be ready for the 65-nm node in 2005 (see Jan. 7 story ). It also means that 193-nm tools will be extended to become the workhorse scanner for most of this decade--at least according to Intel.

Major lithography tool vendors are also expected to announce changes to their own roadmaps at next week's SPIE Microlithography conference in Santa Clara.

At Intel, meanwhile, the chip giant originally had a straightforward progression in its lithography roadmap. The company planned to use 193-nm lithography tools for the critical layers at the 90-nm node in 2003, 157-nm tools for the 65-nm node in 2005, and finally, extreme ultraviolet (EUV) for 45-nm in 2007 and beyond.

Under the new roadmap, there is no change at the 90-nm node. But now, Intel plans to extend the 193-nm tools down to the 65-nm node, due to technical issues and delays with the 157-nm scanners in the market, said Peter Silverman, Intel Fellow and director of company's lithography capital equipment operations.

Then, in 2005, Intel will select the lithography technology for the 45-nm node, which is still expected to move into production in 2007. The 193- and 157-nm tools are the leading candidates at that node, but EUV will get pushed out until the next node due to delays, Silverman said. "We would like to get EUV for 2007, but we don't expect it," he said in an interview with SBN.

Then, in 2007, the company will make another decision for the 32-nm node, which is due to move into production in 2009. At that time, EUV is the leading candidate for this node, although 157-nm technology still appears to be in the picture. EUV is also the leading candidate for the nodes beyond 2009, it was noted.

Intel insisted the lithography changes would not impact its current and future IC production. The new and revised roadmap minimizes risk and ensures the company's process technology will remain on a two-year cycle--regardless of the pace of lithography development, Silverman said. "We want to make sure that we have options and alternatives," he said.

193- and 157-nm delays

The disclosure represents another revision in Intel's changing lithography roadmap. Back in the late 1990s, for example, Intel originally planned to use what it calls a "dual-wavelength" strategy to process wafers at the 130-nm node.

At the time, Intel hoped to deploy 193-nm scanners from Silicon Valley Group (SVG) for the critical layers and workhorse 248-nm tools from Nikon Corp. for the non-critical layers, analysts said. In 2000, SVG was acquired by ASML Holding NV of the Netherlands for $1.6 billion.

However, SVG was unable to deliver the 193-nm scanners to Intel. Subsequently, ASML dropped SVG's 193-nm tools in favor of its own 193-nm program.

Nonetheless, Intel was (and still is) able to successfully ramp up its 130-nm process technology, based on 248-nm tools, reportedly from both SVG and Nikon, according to industry sources.

Last year, Intel reportedly selected two 193-nm tool vendors to support its 90-nm process technology--ASML and Nikon. Asked to comment on its lithography vendors, Silverman said: "Our vendors are ASML, Canon, and Nikon. We use all three suppliers."

The microprocessor giant also plans to deploy low-k dielectrics, strained-silicon and silicon germanium (SiGe) at the 90-nm node. Intel is reportedly using epi reactors and CVD equipment from ASM International B.V. to support its low-k and strained-silicon technologies, according to sources in the industry.

Meanwhile, the company hoped to use 157-nm tools at the 65-nm node, but there have been some problems with this technology. "We are able to extend 193-nm with higher NA scanners," Silverman said. "157-nm has also moved. The fact is that 157-nm will not be ready for the 65-nm node," he said.

One of the problems with 157-nm is obtaining and growing the required calcium-fluoride materials for the lithography lens, he said. He also blamed the delays on an issue called intrinsic birefringence. Last year, researchers found unsuspected high levels of intrinsic birefringence in the lens materials, which will severely affect lens design and images at the wafer level in 157-nm tools.

Sources believe that Intel would prefer to jump from 193-nm tools to EUV, thereby bypassing 157-nm scanners in the process. But given the technical issues with EUV, Intel reportedly wants to keep its options open for 157-nm, sources said.

EUV shocker

Perhaps the biggest shocker in the new roadmap is the delay in EUV, although Intel and others have dropped hints that the technology faces several major challenges.

At a lithography event last year, Silverman said EUV scanners must reach throughput levels of about 120 wafers per hour to become commercially viable, a goal that left many in the audience shaking their heads in disbelief.

Silverman also mentioned a per-scanner target cost of $20 million, which prompted one symposium participant to say he was "surprised the audience didn't break out laughing, it was so unrealistic." Some experts have predicted that EUV scanners will cost $50 million or more, with mask costs also hitting new levels of sticker shock (see Oct. 15, 2002 story ).

In the interview last week, Silverman said that the IC downturn has delayed the overall EUV development among vendors. Last year, Intel ordered a "beta" EUV tool from ASML, which will ship the system to the microprocessor giant in the 2005 timeframe. Intel also plans to take delivery of ASML's first "gamma"--or production-worthy--EUV tool in 2006 (see April 22, 2002 story ).

Silverman said ASML is still developing the tool, but he declined to comment if the Dutch company's EUV program is delayed.