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High-k insulators line up at the gate








EE Times


DALLAS — With the difficult integration of copper largely complete and the onerous effort to bring low-k dielectrics to the interconnect stack well under way, technologists are moving to what could be an even more challenging task: replacing silicon dioxide with high-k dielectrics as the gate insulator.

High-k materials such as hafnium oxide and zirconium oxide exhibit a tendency to "trap" electrons. At the International Reliability Physics Symposium here last week, technologists engaged in a furious debate over whether mobility degradation and threshold voltage instability are problems intrinsic to all metallic high-k materials.

Regardless of whether they deemed high-k's problems intrinsic, many of the researchers attending IRPS predicted that the high-k introduction will prove far more nettlesome than either the copper or the low-k transitions. "SiO2 is at the very heart of the transistor, and replacing it is like performing a heart transplant," said Robin Degraeve, a researcher at the Interuniversity Microelectronics Center (IMEC) based in Leuven, Belgium.

Nevertheless, the industry is prepping for the surgery.

Mark Bohr, director of process architecture and development at Intel Corp., said Intel has "zeroed in on a high-k material. I won't say what that material is just yet, but one thing is for sure: It is not a simple drop-in."

Intel is nonetheless optimistic, Bohr said, that with better control of the deposition of high-k materials, charge trapping in the interface layers between the high-k material and the silicon channel can be improved.

"We don't think the charge-trapping problem is principally in the high-k material itself. Most of the charge is being trapped in the interface layers," Bohr said after his keynote at IRPS. "But improving those interfaces presents formidable challenges," he acknowledged.

As current leakage at the gate worsens, most technologists say, high-k materials will be needed to control power consumption in both low-power and high-performance chips. While the brute scaling of silicon dioxide has gone better than many in the industry expected, electrons increasingly are able to burrow through the progressively thinner silicon dioxide layer, sending leakage current skyrocketing.

As Intel's microprocessors move to billion-transistor densities by 2007, controlling power could mandate the use of high-k materials as soon as the 65-nm node, Bohr said. "If we have a high-k material by then that works, we will use it," he said.

Hafnium oxide, zirconium oxide and high-k materials have an intrinsic tendency to trap electrons, said Glenn Alers, a physicist working at Novellus Systems Inc. (San Jose, Calif.). "The metal atoms in these high-k materials do not all bond well, leaving dangling pairs. And as the k-value increases, the bandgap of the dielectric decreases, and electrons can penetrate into the dielectric more easily. Those intrinsic properties make it much more likely for defects and traps to form" in the high-k materials than in SiO2, Alers said.

Ashraf Alam, a gate oxide research manager at Agere Systems (Allentown, Pa.), said that in order to limit voids between the insulator and the silicon channel, the high-k layer often is grown on top of an interfacial layer of silicon dioxide of 4 to 10 angstroms.

"The high-k layer must be relatively thick, in the range of 3 to 4 nanometers 30 to 40 angstroms, so that the high-k molecules can cross-link with neighboring atoms," Alam said. "Those molecules are relatively rich in electrons compared with silicon dioxide, thus the higher rates of charge trapping."

IMEC's Degraeve: Can EEs live with high-k's 'intrinsic' instability?
IMEC's Degraeve said the center's researchers have reached some disturbing early conclusions about the high-k transition. When voltages are applied to test circuits, he said, high-k materials exhibit "significant and immediate shifts in threshold voltage" that are attributable to charge trapping.

Some believe this threshold voltage instability may be predictable, with design-around solutions. But Degraeve said the shifts are so large-measuring as high as 80 to 100 millivolts under the pulsed conditions typical during IC operation-there is no clear way to design around them.

For an IC operating at 1 V, with a threshold voltage of 400 mV or so, a shift of 80 to 100 mV in the threshold voltage would present enormous challenges to circuit designers. The shifts would make analog circuit design, which is sensitive to very small changes in threshold voltage, particularly challenging.

"This is an intrinsic property of high-k materials, and there are no indications about how to solve these issues," Degraeve said. The question for designers is, Can you live with it?"

Voltage instability is "very difficult to get rid of," he said. "The charge-trapping effect is extremely fast and immediately reversible." That is, when a voltage is no longer applied, the trapped electrons flow out of the insulator. SiO2, by contrast, builds up trapped charges gradually, over a period of years.

The IMEC team has tested many combinations of high-k insulators, Degraeve said, and all exhibit charge trapping. The most promising material from a process stability stance is hafnium oxide, he said.

Texas Instruments Inc. reliability engineer Ajit Shanware presented a more encouraging picture. TI, he said, plans to use a hafnium silicate dielectric with a k-value of 13, a so-called medium-k material that bridges between silicon dioxide and the higher-k metallic oxides.

At IRPS, Shanware said the HfSiN material causes threshold voltage instability of about 10 mV-far lower than the 80 to 100mV IMEC warned of-in NMOS transistors. "We believe the threshold voltage instability is mainly due to stress, rather than electron trapping, and that most of the charge trapping is near the interface" with the silicon channel, he said.

With more careful control of the stressed interface between the channel and the high-k oxide layer, further improvements can be expected, Shanware said. But he acknowledged it will take time to work out the myriad process issues.

Luigi Colombo, who heads TI's high-k oxide development group, said that his company knew of "no conclusive experimental or theoretical evidence that high-k instability is a fundamental problem" and insisted, "With control of defects, and proper materials selection, the industry should be able to overcome its current limitations."

But others warned that voltage instability and mobility degradation can be more pronounced in PMOS transistors than in the NMOS devices TI discussed.

Max Fischetti, an electron transport physicist at IBM's Thomas J. Watson Research Center (Yorktown Heights, N.Y.), said he believes high-k materials have intrinsic mobility degradation properties but that process control improvements might at least contain the degree of mobility degradation to the intrinsic level. The problem is that the industry doesn't have much time.

While MOSFETs were proposed in the late 1930s, it wasn't until 1964 that the industry's pioneers, including Intel's Andrew Grove, realized circuit instabilities were caused by potassium and sodium contamination in the SiO2, Fischetti said. Since that breakthrough, "we've had three decades to study silicon dioxide-but the industry wants to bring in high-k materials very quickly, in this decade."

No surprise

Asked in an interview to reconcile the differences between the IMEC and TI presentations, Fischetti said, "I'm not surprised that these labs are reporting inconsistent results. While we are all learning fast, these processes are not very well-controlled yet. The annealing steps, the deposition and growth techniques, all require a lot more optimization-but we don't have much time before these new materials may be needed."

The industry has seen "pretty promising results" from silicates, such as zirconium silicate and hafnium silicate, he said, but "when we try to measure the mobility, for most transistors with these high-k materials it is pretty bad." Degradation ranges "from 30 percent up to a factor of two compared with the universal mobility curve. A 30 percent hit is not good news."

The hit to mobility is intrinsic, Fischetti said, because as the dielectric constant increases, the electrons tend to polarize, and the bandgap decreases sharply. The phonons in high-k materials vibrate with a frequency that results in softer atomic bonds, which lead to charge trapping.

"There are dark areas in the theory, and at the experimental level we don't know exactly where we are with some deposition techniques," Fischetti said. "So I take some of these early results with a grain of salt. But if the problems are intrinsic because of remote scattering of the optical phonons-if that is true-then we could be in bad shape."











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