At the Rambus Developer Forum in Japan on Tuesday, Rambus outlined its strategy in order to keep up with competitive next-generation memory technologies, most notably double-data-rate (DDR) SDRAM.

Intel Corp.--the main backer of Rambus' RDRAM memory architecture--endorsed the roadmap. "Intel supports the steps that Rambus and the RDRAM industry are taking to address the anticipated memory demand," said Louis Burns, vice president of the Desktop Products Group at Intel.

While Intel is endorsing the new Rambus roadmap it is also quietly sampling Brookdale--a PC chip set for the company's Pentium 4 microprocessor line that supports a competitive memory architecture--synchronous SDRAMs. At present, the Pentium 4 only supports Rambus' RDRAM products, which are more expensive than SDRAMs in the marketplace, according to analysts.

In early 2002, Intel is also expected to roll out another chip set that supports DDR SDRAM--the main competitor to Rambus' RDRAMs.

As a result, Rambus is scrambling to maintain its position with Intel--and the rest of the PC market. At present, Rambus' RDRAM products are 800-MHz devices designed for high-end PCs and low-end workstations.

But joining the 800-MHz RDRAM devices on its memory roadmap are two additional frequencies: 1,066 MHz and 1,200 MHz. Initially supplied by Samsung, Toshiba and Elpida, the new PC1066 and PC1200 RDRAM devices will become available in volume production in 2002 and 2005, respectively, according to the companies.

In addition to RDRAM device frequency increases, Rambus-enabled RIMM modules will be increased from 16-bits at the present time, to both 32- and 64-bit architectures in the future.

The 16-bit, 32-, and 64-bit RIMM modules are expected to ship into different segments of the market, including servers, workstations, and even mainstream PCs.

This extension quadruples the RIMM module bandwidth. Combined with RDRAM frequency increases, Rambus has developed a PC memory roadmap that is scalable to 9.6 gigabytes per second, the company added. (Correction: An early version of this story incorrectly said the modules would be scalable to 9.6 gigabits per second.)

--Mark LaPedus reporting from Silicon Valley