The company announced at this week's Electronica exhibition here it broke its own record of 25 Gbit/s using optimized circuit techniques and by using the CMOS process with maximum efficiency.

40 Gbit/s CMOS high frequency circuits were previously only possible using SiGe bipolar or complicated and expensive process techniques such as GaAs or InP, according to Infineon. The researchers say its results represent a breakthrough for the development of multifunctional multiplexer/demultiplexer chipsets. Such parts are currently only made using separate SiGe RF components and CMOS logic chips.

Infineon says the development gives it an edge over competitors developing such parts for operation at 40Gbit/s.

"Infineon is setting new standards with these RF-CMOS circuits and is reasserting its leading technical position in the semiconductor market," stated Soenke Mehrgardt, CTO and board member at Infineon. "This and other successes are the result of the hard work and investments that Infineon has made within the scope of its global research and development activities."

The multiplexer/demultiplexer chipset was implemented using current mode logic and differential 50 ohm I/O. The high transmission rate was achieved through a combination of careful circuit optimization: pre-latch configuration, transistor size, operating current per stage, gain peaking due inductive loads and a new type of output signal transmission optimization.

The multiplexer achieved a maximum transmission rate of 43 Gbit/s in initial tests. It used a 1.5 V power supply and has power consumption of a mere 66 mA. The data demultiplexer (1:2) also used 1.5 V and has power consumption of 72 mA. The maximum data speed for the demultiplexer was measured at 40 Gbit/s.

The research was conducted by a tem at Infnieon's corporate research laboratory in Munich led by 26 year old PhD student Daniel Kehrer. The team collaborated with researchers at the Technical University of Vienna as well as the University of Bochum.