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Intel draws the threads of parallelism for chips







Chris Edwards
EE Times UK
(09/30/2002 6:26 AM EDT)

Intel is looking to make its processor designs more modular. This will prevent them from drawing too much power when running on batteries, without resorting to brute-force power-saving methods such as voltage or clock speed scaling.

The company is taking advantage of the shift in research from instruction-level parallelism, which has practically reached the end of its natural life, to thread-level parallelism. Wilfred Pinfold, technical director of microprocessor research at Intel, said: "We are moving towards the era of threads parallelism."

Already employed on the Pentium 4 Xeon, thread-level parallelism lets the processor handle different instruction streams at the same time. Intel is continuing its work into running threads speculatively to provide speed-ups for code written as one thread.

But at the same time, the company is trying to break down the blocks used to enable parallelism into discrete entities. "We are making designs more modular so our ability to reuse parts goes up," said Pinfold. "The real benefit of a more modular design is that you can turn elements off."

He says the ability to turn speed-ups on and off dynamically will make power management in portable systems more effective: "You will see a lot more intelligence used towards power management in general, to make sure you only use features where you have the power.

"The processor will look at how much computation it can get for a given power budget.

"One way to save power is to slow down a task until you need the data. Threads often run faster than they need to. We are looking at how to work that out into a fruitful area of research."











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