DDR-II is expected to go into production in the third quarter of next year, six to nine months after AMD's new desktop Athlon Hammer and its Opteron server/workstation versions launch. But the Hammer chips have the unique architecture of on-die memory controller for the current DDR-I generation. Switching to on-die support for DDR-II requires a new Hammer chip controller design with all that entails.

AMD confirms that Hammer's on-die memory controller now supports only DDR-I, and that DDR-II will require a new Hammer chip design, at least for the memory portion. But the company claimed this was no big deal.

AMD embedded the North Bridge controller on the Hammer chip to gain much faster memory throughput and lower latency and lessen impedance problems -- all increasingly major issues with external chipset controllers. High-speed data signals aren't impeded by the extra connection to an external North Bridge.

AMD doesn't yet reveal how much performance gain the on-die controller brings, but said it is all part of the overall new architecture expected to yield 25% to 30% improvement over the best current processors and chipsets.

It's the classic dilemma between embedded cores that require new chip design to change vs. discrete external chips that give flexibility but at some performance tradeoff.

Intel Corp., of course, faces no such challenge, since the MPU giant relies on external chipsets for all of its processors. New chipsets can be run in to support the latest memory or processor technology interfaces as required.

Embedded DRAMs face the same tradeoff. And because new iterations of DRAMs come so thick and fast and in ever more flavors, the choice is often made simply to skip embedding the memory for whatever increased performance is offered, and stick with discrete DRAM chips.

The issue is joined even more in AMD's Hammer series and the upcoming DDR-II. The next generation memory is expected to offer major enhancements for servers and workstations, one of the big markets AMD is eyeing for its new processors.

AMD said DDR-II won't really hit its market stride until 2004. At that time AMD will be ready with a new iteration of Hammer, which at that point will have been a year or so on the market and ready for upgrade. "We will support DDR-II when it comes into the market," a spokeswoman stressed.

That means AMD has to be on a similar DDR-II testing and qualification timetable right now for Hammer as the infrastructure now starting to gear up with external chipset support for Intel processors. Two DRAM vendors, Samsung Electronics Co. and Elpida Memory, are already starting to sample DDR-II chips to start the infrastructure qualification process. In the next year, chipsets, motherboards and hardware systems will test and validate DDR-II in their products, to be ready for a production pushout after mid-year 2003.

AMD led the major processor push into DDR-I, as Intel was delayed in turning its huge processor battleship around from a sole commitment to RDRAM. The No. 2 MPU firm doesn't want to be upstaged by Intel in the next-generation DDR-II.

But this steeple chase has a new wrinkle. AMD is riding a new entry on-die memory controller horse. So watch the gates when the bell rings for the DDR-II takeoff and contenders head into the first turn.