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Xanoptix stacks chips to create hybrid ICs |
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Nicolas Mokhoff
(01/27/2003 11:05 AM EST) URL: http://www.eetimes.com/showArticle.jhtml?articleID=10800399 |
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SANTA CLARA, Calif.Startup Xanoptix Inc. has developed a wafer-scale manufacturing process that allows silicon die, optical semiconductors and compound semiconductors such as gallium arsenide and indium phosphide chips to be stacked into three-dimensional structures to create hybrid ICs. The company is announcing its Hybrid Integrated Circuit Technology this week at DesignCon 2003 .
Xanoptix's wafer-scale micro-mechanical attachment process places multiple semiconductor die directly on top of a silicon wafer. The stacking technique will eventually combine a large numbers of lasers, detectors and/or transistors with third-party silicon ICs fabbed in a conventional foundry. "The resulting chips offer high integration density, low cost and reduced power consumption," said John Trezza, president and chief technology officer of Xanoptix, based in Merrimack, N.H.
"The practical integration of compound semiconductor functionality with silicon integrated circuitry has been an elusive goal challenging semiconductor device researchers for over 20 years," said Clifton G. Fonstad Jr., Vitesse professor of electrical engineering at MIT. "A manufacturable integrated circuit process that combines the unique performance of III-V and II-VI semiconductors with digital computational and memory prowess of silicon can enhance system performance over those made with conventional integrated circuits because it will allow designers to use, in one integrated chip, the best devices from multiple material systems and to integrate functions not available in any single material system."
Xanoptix's process can integrate thousands of devices in silicon or compound materials, such as GaAs or InP-based lasers, detectors, and transistors, with such third-party silicon ICs as transceivers, network processors and DRAMs. The resultant silicon may be fabbed in any conventional silicon foundry. A series of integration and post-processing steps ensures the proper attachment of the stacked materials.
Anybody's silicon
Xanoptix and its partner companies Analog Devices Inc., Vitesse Semiconductor Corp. and Velio Communications Inc. have already used the technology to create a number of different products. The company has also developed and licensed related packaging technology such as high-density MT ferrules. "But these products were a combination of our partners' and our technology," said Trezza. "We are now coming out of our semi-stealth mode and are announcing our capabilities to allow anybody's silicon combined with compound semiconductor devices such as lasers, sensors and detectors at the wafer levels."
The XTM series of optical transceivers that Xanoptix has produced have generated revenue for the past two years, Trezza said. The transceivers contain up to 36 transmit and 36 receive channels operating asynchronously at up to 3.4 Gbits/second per channel. Previous MT-style connectors could only hold up to 24 fibers. "We are now shipping chips with 180 active optical devices in less than one-twentieth of a square centimeter," Trezza said.
Xanoptix was founded in 1990 by Trezza and nine other collaborators formerly employed by Lockheed Martin. Many of the ideas for the hybrid IC manufacturing process were developed when Trezza was on the research faculty at Stanford University. The company received $40 million in its initial round of funding and another $40 million in a second round last year. Trezza said he is confident that funding will hold the company until 2004, when the first products taking full advantage of the hybrid IC technology become commercially available. Xanoptix now employees 50 workers.
Xanoptix runs a gallium arsenide facility where third-party silicon will be post-processed to create hybrid ICs, Trezza said.
"Creating three-dimensional, stacked structures from silicon or compound semiconductors through a highly manufacturable process is of great commercial importance," said chief executive officer James D. Norrod in a statement. "It allows the use of low-cost chip technology and mainstream silicon designs for applications that, up to this point, relied on expensive specialty processes."
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