The company did not describe the area over which the 10 billion junctions were deposited. Hence, it is not clear whether its approach is a wafer- or chip-scale development. Nor did the Boston-area company claim to have created any working junctions.

But the development is a waypoint in achieving Nantero's goal of a nonvolatile RAM (NRAM).

Nantero estimated the total market for this type of memory, a potential replacement for all today's established memory component formats, is about $100 billion a year. Nantero claimed at its web site that its NRAM would be much faster and denser than DRAM, have lower power consumption than DRAM or flash and be highly resistant to environmental forces such as heat, cold and magnetism.

However, Nantero provided no timelines for the creation of a commercial NRAM component. Indeed, the company has yet to disclose the operational principle of the memory cell or how it would be integrated with conventional microelectronics.

What's known so far is that the NRAM junction involves the use of suspended nanotube junctions as memory bits, with the "up" position representing bit zero and the "down" position representing bit one. Bits are switched between the two states through the application of electrical fields, the company said.

This leaves unexplained the principle of electronic bit-state sensing, whether the read-out is destructive or not and if the setting of bits is based on mechanical movement, what the endurance of such a memory cell would be.

Standard processes

Nantero has said that each junction contains multiple nanotubes, providing redundancy and protection against catastrophic bit-failure. Nantero also said the array was produced using only standard semiconductor processes, thereby making manufacture of the NRAM in existing wafer fabs more likely.

A nanotube is a form of fullerene carbon in which the hexagonally connected "graphite" sheet is curled up to form a tube of nanometer-scale diameter. Nantero said it has succeeded in depositing a thin layer of carbon nanotubes over the entire surface of the wafer, and then used lithography and etching to remove excess nanotubes and form an array.

"This gets around the problem that nanotubes cannot reliably be grown in large arrays. At the end of our process only the nanotubes in the correct positions are remaining," Thomas Rueckes, chief scientific officer and Nantero co-founder, said in a statement. "This process was used to make a 10-Gbit array now, but could easily be used to make even larger arrays; the main variable now controlling the size is the resolution of the lithography equipment," he added.

"Creating this enormous array of suspended nanotubes using standard semiconductor processes brings us much closer to our end goal of mass producing NRAM chips," added Greg Schmergel, chief executive officer and co-founder.

Nantero also announced that is has added Mohan Rao to its Scientific Advisory Board. Rao previously served as senior vice president at Texas Instruments. In October 2001 the company said it had raised $6 million in first-round funding.