The silicon foundry giant is also accelerating the development of its 0.10-micron technology by moving the process into initial production by the third or fourth quarter of 2002.

Based on its aggressive development schedule, TSMC could become the world's first chip maker to deliver 0.10-micron technology--ahead of even IBM Microelectronics, Intel and other IC leaders, according to analysts. For example, Intel Corp. has stated that its chips based on 90-nm (0.09-micron) technology will not be out until early-2003 or so, according to analysts.

While Hsinchu-based TSMC is still ramping up its 0.13-micron technology within its fabs, the company in October formally announced its 0.10-micron technology for use in system-on-a-chip (SoC) and other complex designs. TSMC plans to start its "early partner program" for the development of 0.10-micron chips in the second quarter of 2002 (see Oct. 10 story ).

It plans to move its 0.10-micron technology into production by "the end of the third quarter or beginning of the fourth quarter of 2002," said Shang-yi Chiang, senior vice president of research and development of TSMC. "It's more likely that we will move into production in the fourth quarter," Chiang said in an interview with SBN at the DesignCon 2002 conference in San Jose.

Analysts believe that TSMC will not move into volume production until early- to mid-2003, but the company still appears to be far along with its new process. "We've demonstrated a transistor," he said. "Our technology is based on a 0.10-micron process, but the channel length of our transistors are only 65-nm (0.065-micron)," he said.

TSMC's 0.10-micron process will include copper-interconnects, low-k dielectrics, and other advanced features, he said. And to minimize the risks--and hedge its bets--the company plans to migrate the technology from its 200- (8-inch) fabs to its 300-mm plants.

In fact, the company has two separate teams to develop 0.10-micron technology--and for good reason. The first team is developing the process in its Fab 4 plant in Hsinchu, which is an 8-inch, R&D facility.

The other team is developing the process, based on large-size, 300-mm wafer technology. "The trouble with 0.10-micron technology is that it's caught between the transition from 200- to 300-mm," he said.

The development of 0.10-micron technology in an 8-inch fab is "not cost effective," said the TSMC executive. So by year's end, the company hopes to bring its 0.10-micron into production within Fab 12, its massive, 300-mm plant in Hsinchu. "But if the 300-mm tools are not mature, we can ramp up the technology in the 200-mm plants," he said.

To develop chips based on the process, TSMC plans to use 193-nm lithography tools from its long-time scanner and stepper vendor--ASML Holding N.V. of the Netherlands. For years, TSMC has relied on ASML's tools for its production fabs, especially 248-nm tools.

TSMC will use ASML's Twinscan 1100 AT line of 193-nm tools for its next-generation designs, he said. "For 0.10-micron technology, there are a lot of critical layers," he said. "We will use 193-nm tools," he added.