Agilent Labs pursues FeRAMs, optical processors, and 100-Gbit Ethernet

 
PALO ALTO, Calif. -- Behind the protected doors of Agilent Labs here, researchers are in pursuit of a surprising range of advanced and somewhat exotic R&D projects to position Agilent Technologies Inc. in emerging new markets by the middle of this decade.

During a rare event for the press and media this week, Agilent executives opened up the central research lab to provide a glimpse of major efforts to create a new class of FeRAM-based nonvolatile memories, photonics processors and buses for all-optical switching systems, 40- and 100-Gigabit Ethernet communications, and much lower-cost chip testing technologies.

The Palo Alto-based lab aims to enable Agilent to stay a step or two ahead of its formidable competitors and to provide the leading-edge "spark" for future products, declared Ned Barnholt, president and chief executive of Palo Alto-based Agilent.

Agilent is the test, measurement and IC spin-off of Hewlett-Packard Co. The Agilent Labs had been part of the legionary HP Labs organization. When Agilent was spun-off in 1999, HP shifted part of its prized R&D organization to the new company.

Last year, Agilent spent a total of $1.2 billion in R&D. About 8% of that total was directed towards Agilent Labs, a large organization that is keeping up with the times despite what many might think is an antiquated business model, said company officials.

"Most central labs are viewed as ivory towers," said Thomas Saponas, executive vice president and chief technology officer at Agilent. The lab's "mission is applied research that supports our product groups," he said at the event.

Its R&D efforts are already having a major impact on the company. For example, Agilent is quietly preparing a new indium-phosphide (InP) process for high-speed communications chips. The company will ramp up the InP process in a new fab in Fort Collins, Colo. (see March 13 story).

Moving into new memory markets

Another intriguing effort within Agilent Lab's involves a non-traditional product area--nonvolatile memories. While Agilent itself is not in the merchant memory market, the company is aggressively workingwith an undisclosed partner to develop an FeRAM (ferroelectric random-access memory) technology called "UltraRAM."

Agilent Labs has devised a 4-megabit test chip based on the "UltraRAM" technology. The FeRAM makes use of lead zirconium material and a storage cell technology made with a single transistor and capacitor to boost the performance of the chip, said James Hollenhorst, director of the Electronics Research Laboratory at Aglient Labs, in a presentation.

The technology could potentially put existing flash-memory devices out of business, Hollenhorst declared. "UltraRAM" is an embedded technology "that will replace flash memories," he said.

In an interview with SBN after the presentation, Hollenhorst said that "UltraRAM" holds more promise than other next-generation, nonvolatile memory technologies, such as magnetic RAM (MRAM) and ovonic unified memory (OUM).

"We are much farther along than OUM," he said. One major company, namely Intel Corp., is moving full speed ahead with OUM (see March 1 story).

Agilent remains undecided if it will sell its "UltraRAM" chip technologies in the merchant market. The company may embed this technology within its own products or license it to other companies, according to a spokesman for Agilent.

Photonics processors and buses

While Agilent Labs is looking at some non-traditional markets, the operation is by no means ignoring the company's core strengths: test, measurement and communications semiconductors.

For example, the R&D organization is pursuing the latest buzzword in the communications industry: photonics. In this arena, it is developing a slew of technologies, including two key enablers, including a programmable photonics processor or switch as well as a photonics bus for PCs and other computer systems.

In one effort, Agilent Labs is developing an "on-off crystal switch" device that acts much like a central processing unit in a system. The switch is built around programmable photonic crystals, said Waguih Ishak, director of the Communications & Optics Research Laboratory at Agilent Labs, in a presentation.

The technology will reportedly enable the "Holy Grail" in the communications industry: the all-optical switching system, according to Agilent. In fact, Agilent is working with the University of California at Los Angeles (UCLA) and a little-known systems company in Israel to develop the photonics processor or switching device, the company hinted.

In late 2000, Agilent, along with troubled energy giant Enron Corp. and others, invested $25 million in a company called Trellis Photonics. The Jerusalem-based company is developing what it calls the Intelligent Lambda Switch, an all-optical switching system for high-speed Dense Wavelength Division Multiplexing (DWDM) networks.

Trellis' core technology, called Electroholography, eliminates the need to convert optical signals into electrical signals at each node. The foundation of Electroholography is a photonics crystal, according to the company.

Meanwhile, in another major effort in the arena, Agilent Labs is also developing what it calls "optics to the processor," or the long-awaited photonics bus. The photonics bus could one day replace existing bus technologies in a system, including PCI and the follow-on schemes in personal computers, Ishak said.

Researchers have been talking about photonic buses for years, but the technology has yet to make it in the commercial market, due to the advances in traditional bulk silicon, he pointed out. "Every year, the photonic bus is 10 years away," he said. "But we could see the photonic bus by the end of the decade," he said in an interview with SBN.

In a somewhat related space, Agilent is developing new enablers for fiber-optic networks. Company scientists are attempting to improve the performance of vertical-cavity surface-emitting lasers (VCSELs) that are key to computer interconnects, infrared links and telecommunications systems.

These laser-on-a-chip products project a light beam perpendicular to the chip's surface. In this arena, the company is pursuing a 1,300-nm VSCEL for use in long-haul applications up to 10 kilometers.

At the same time, it is looking into new and improved tunable lasers that promise wavelength-selectable cross-connects and optical add/drop multiplexers, making real-time wavelength provisioning possible.

Faster Ethernet on the horizon

Agilent Labs is also pursuing more conventional local- and wide-area networking technologies as well. For example, Agilent is a leading supplier of transceivers for the existing Gigabit Ethernet and 10-Gigabit Ethernet standards.

But to maintain its position in the market, Agilent is developing next-generation, Ethernet technology, based on what company researchers believe will revolve around the 40-Gigabit Ethernet and/or the 100-Gigabit Ethernet standards.

While the standards bodies will not determine the next-generation Ethernet standard for some time, Agilent Labs is wasting no time on the matter: it will develop a prototype 100-Gigabit Ethernet device "by the end of this year," Ishak said.

The company dropped hints that it will develop a 100-Gigabit Ethernet device by devising a 10-channel transceiver. Each channel will have a data rate of 10-gigaibits-per-second, according to Agilent Labs.

Lowering chip-testing costs

Not to be outdone, the company is also moving to solve a major problem in the market: soaring chip-testing costs. Agilent is no stranger to the automatic test equipment (ATE) market, given its legacy in the field and leadership position in testers for system-on-a-chip, printed-circuit board, and other applications.

To combat souring test costs in the overall ATE industry, the company is moving towards a "DFT-centric" model, said Wilhelm Radermacher, manager of the automated test innovations department within Agilent Labs.

The Agilent researcher was referring to design-for-testability or DFT, which includes boundary scan, built-in-self-test (BIST) and other methodologies to lower the cost of test. It is also pushing towards multi-site parallel testing techniques and "concurrent test," he said.