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Philips starts SoC production on 0.12-micron CMOS |
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Peter Clarke
(11/04/2002 4:38 PM EST) URL: http://www.eetimes.com/showArticle.jhtml?articleID=10806312 |
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EINDHOVEN, The Netherlands --- Philips Semiconductors has begun manufacturing commercial quantities of complex logic devices on CMOS12, its 0.12-micron process technology, the company said.
The CMOS12 process is roughly equivalent to a 0.13-micron process technology from Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) called CL013G and Philips said that circuits proving the technology and the design flow have been made at both a wafer fab belonging to TSMC and at Crolles2, the French research fab which STMicroelectronic shares with Philips and also Motorola.
The most complex 0.12-micron system-chip that the company has produced via TSMC and its own facilities features multiple digital signal processors and almost 9-Mbits of static RAM, the company said.
"It is a circuit for the telecom domain, it's an infrastructure chip," said Rene Penning de Vries, deputy chief technology officer of Philips Semiconductors. "I can't tell you the customer's name but it's a very demanding chip in terms of area. It is a fully digital application, which makes things a bit easier, but there is always some analog on-board."
These chips were 'right-first-time' in terms of design, which together with the quality of the 0.12 m CMOS process, meant that the first chips off the production line met all performance specifications, Philips claimed in a statement.
"Critical to the development of our 0.12 m CMOS12 process, we put a great deal of effort into ensuring that the design rules were consistent with achieving a high yield when the process came on-stream this year," said Penning de Vries.
Other companies have been claiming progress with 0.13-micron CMOS over the last year but whether Philips is a late bringing up a 0.13-micron process or early with a 0.12-micron process is a moot point argued Penning de Vries.
"We're talking about the same process node but it is one that the industry has been struggling with. This is because the industry is trying to apply copper interconnection technology and low-k dielectric insulator material at the same time," he said. "IBM has had problems with 0.13-micron. The foundries have had problems with 0.13-micron," he said.
Penning de Vries said Philips had been successful by not pushing to use an extremely low-k insulator but instead using fluorinated silicate glass (FSG) laid down with a chemical vapor deposition (CVD) process.
"But it's not just about the process. The design technology is also critical. It is difficult to get timing closure at these nodes and you need a solid methodology and solid set of tools."
The decision to make the design rules for CMOS12 fully compatible with TSMC's CL013G manufacturing process gives customers the security of multi-sourcing and allows them to incorporate third-party IP into their SoC designs.
The 0.12-micron process will be migrated to a Philips-owned wafer fab as demand builds up Penning de Vries said. "The transfer will be done but not necessarily immediately. We can make at TSMC or at Crolles2. We have options depending on how quickly the market returns," Penning de Vries said.
For the next generation process technology Philips, STMicrolectronics and Motorola SPS are working towards harmonizing their CMOS process technologies around a baseline CMOS from TSMC at the 90-nanometer process node. The companies have already started migrating cell libraries to the 90-nm process technology (see August 27 story).
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