For years, Intel has used big and expensive VLSI logic automatic test equipment (ATE) from two major suppliers--Schlumberger Semiconductor Solutions and Teradyne Inc. These ATE systems, sometimes called functional testers, have been used to test Intel's processors and other chip lines to ensure that a given device is functioning properly.

Intel officials said the company will continue to utilize these functional ATE systems for production purposes--at least in some cases--but as part of the new strategy, Intel is moving away from putting functional testers on the manufacturing floor. A prime reason for limiting the use of these testers is the soaring costs for these systems, according to company.

Instead, Intel has shifted to what it calls a "distributed test" approach to chip testing. "Distributed test," commonly known as structural test in the industry, makes use of BIST and related technologies to reduce the cost of test.

Another facet of "distributed test" is a shift towards a new generation of low-cost ATE systems, which perform structural test on devices. In fact, Intel has reportedly procured these new structural testers from several vendors, including Schlumberger, Teradyne, and others, according to sources.

But recently, Intel reportedly awarded a major ATE contract to Schlumberger, according to sources. Under the terms, Schlumberger will build a line of structural testers for Intel; the ATE maker is already shipping these systems to the Santa Clara chip giant, sources said.

Intel declined to comment on its ATE vendors, but acknowledged that the days of big-ticket, functional testers are numbered at the Santa Clara-based chip giant.

"We're seeing the end of the road for functional testers," declared Mike Mayberry, general manager of sort test technology at Intel. "Functional testers are simply running out of capacity," Mayberry said in an interview with SBN.

There are other major issues as well. "In the past, test was so cheap that you didn't have to worry about it," Mayberry noted. "But test is getting more and more expensive. At some point, the cost of testing a device could exceed the cost of manufacturing the chip itself," he added.

Double trouble

In fact, there is a troubling correlation between Moore's Law and cost of test. Moore's Law--the axiom devised by Intel co-founder and chairman emeritus Gordon Moore--states that the transistor count in a microprocessor will double every 18 months or so.

But the cost of test also doubles for each new generation of processors---a trend that could make it prohibitive to procure traditional ATE systems in the future, according to Intel.

For example, the price of a functional tester is projected to remain constant, ranging from $7,000-to-$9,000 in terms of the cost-per-pin for a device, Intel officials noted. But on the other hand, the number of pins--and transistors--on a device are increasing, thereby escalating the costs for functional testers, said managers.

In sharp contrast, the price for lower-end testers, or structural testers, is about $6,000 in terms of the cost-per-pin for a device right now, according to Intel. But next-generation structural testers are projected to range from $1,000-to-$2,000 in terms of cost-per-pin for a device, said Intel managers.

There is an even more glaring example. The actual price for a high-end, VLSI logic tester has increase by 25-fold over the last two decades, from about $400,000 per system in the 1980s, to $3-to-$5 million in the mid-1990s, to $6-to-$10 million for a 1,024-pin, 1-GHz system today, said analyst Ron Leckie of Infrastructure Inc.

Next-generation, functional testers could run as high as $12 million, predicted Leckie. "There are other problems with functional testers: performance and complexity," added the Saratoga, Calif.-based analyst.

For this reason and others, Intel has geared its new "distributed test" strategy to lower the chip-testing costs, especially for the Pentium 4 processor--which is locked in a price/performance battle with Althon central processing units from archrival Advanced Micro Devices Inc.

At present, Intel's fastest Pentium 4 processor is a 42-million transistor device that currently runs at speeds up to 1.7-GHz. But the company is expected to roll out a 2-GHz version by the end of the third quarter of 2001.

And in 2002, Intel could roll out Pentium 4 chips that runs up to 5-GHz, making test a more cumbersome and expensive part of the chip-manufacturing equation, according to industry observers.

"It's hard to develop testers that will run that fast," Leckie noted.

Making the shift

To address these issues, Intel began to devise its so-called "distributed test" strategy back in 1997. At the time, company hoped to implement this strategy in its vast, internal chip-testing operations in three major locations: Chandler, Ariz.; Hillsboro, Ore.; and Penang, Malaysia.

In those facilities, Intel uses VLSI logic testers from Schlumberger Semiconductor and Teradyne. "We're buying testers from both Teradyne and Schlumberger," Mayberry said. "But we buy from multiple vendors."

Industry sources believe Intel's main VLSI logic test vendor is Schlumberger Semiconductor Solutions, which is part of Paris-based Schlumberger Ltd. Intel has a large installed base of Schlumberger's ITS 9000 line of testers. Last year, the French-based ATE supplier rolled out a new line of testers--dubbed the EXA3000, which is a low-cost, system-on-a-chip ATE product (see June 2, 2000, story).

The ATE maker is also reportedly developing another low-cost system as well, sources said. That system is being developed to support Intel's "distributed test" strategy, they added.

Intel also has a large installed based of Teradyne's J973 line of VLSI testers, sources said. Teradyne sells two versions of the J973. One is a high-end system, while the other is a lower-cost structural tester.

In addition to low-cost testers, Intel is also banking on another hot technology: BIST. Today's chips integrate large blocks of embedded memory, logic, and mixed-signal functions.

Is BIST best?

One solution now being pushed by many chip companies to handle these complex devices is BIST. Built-in self-testing employs integrated controller blocks to perform testing of embedded cores and memories. Some companies aim to use BIST blocks to perform at-speed tests on each IC function and then report the results back to an ATE system. One tradeoff, however, is that BIST requires extra silicon area and transistors, which increase the die size and potentially cost at the frontend of production.

Intel is reportedly developing its own BIST solutions. But it is also using software products from third parties, reportedly including LogicVision Inc. of San Jose. In fact, Intel took out an equity investment in LogicVision in 1999.

LogicVision would not discuss its customer base, but officials said BIST is taking off in the market. "If you look what happening in the IC industry, people are building more and more system-on-a-chip (SoC) functions in their IC designs," observed Rodger Sykes, vice president of marketing for LogicVision. "To reduce the costs of test, what we're doing is putting a 'micro-tester' in each of the silicon blocks in a SoC design," he added.

At that point, Sykes said, integrated circuit makers can use the new structural testers in the market to test each silicon block via BIST to ensure functionality.

In fact, there is a new age of cooperation of BIST and ATE suppliers. LogicVision has struck deals with several ATE makers in order to link built-in chip testing technology with stand-alone, low-cost ATE systems. LogicVision has signed deals with Advantest, Credence, LTX, Teradyne, and others.

After years of resisting cooperation with built-in self-testing concepts, it now appears that ATE vendors have no choice but to jump on the BIST/low-cost ATE bandwagon. Chip makers "are not going to throw out their existing ATE," Sykes said. "But the big integrated device manufacturers are saying: 'We are not going to pay that kinds of money for today's expensive testers."

And, at Intel, that's certainly the case.