SANTA CLARA, Calif. -- Continuing its rapid expansion into 300-mm wafer-processing technologies, Intel Corp. here is reportedly planning to set up another 300-mm fab, this time in Silicon Valley, according to a new report from Prudential Securities Inc. The new development fab could represent Intel's seventh 300-mm wafer plant to date.
Intel will not comment on the report, but an e-mail newsletter from Prudential Securities said the chip giant plans to convert its 200-mm R&D fab, located near its headquarters in Santa Clara, into a 300-mm development center. The "D2" facility has primarily served as a 0.18-micron R&D fab, using 200-mm (8-inch) wafers. It is now expected to be converted to 300-mm substrates for 0.13-micron technology development by 2002, said the report issued on Thursday.
"Our proprietary field checks reveal that Intel has decided to convert its 200-mm D2 Santa Clara fab to a 300-mm fab in 2002," said the New York-based brokerage firm. "Currently, D2 is ramping Pentium 4 processors at 0.13-micron technology and also builds flash memories," the report added.
When asked if the fab would be converted to 300-mm wafers, an Intel spokesman responded, "We have not made any announcements about D2."
The spokesman acknowledged that Intel has completed the fourth module in the D2 plant, which will build chips based on 0.18-micron design rules.
The conversion of the D2 plant could represent the seventh 300-mm (12-inch) wafer facility that is either operating, under construction, or on the drawing boards at Intel. The world's largest semiconductor manufacturer plans to operate three 300-mm fabs in Hillsboro--separate D1C and D1D development fabs and the new "RP1" research facility.
Two months ago, SBN reported that Intel was planning to build the new D1D 300-mm fab (see May 14 story). Intel is also planning dedicated 300-mm production fabs in New Mexico, Ireland, and Arizona.
A significant portion of Intel's record $7.5 billion capital spending budget in 2001 has been earmarked for 300-mm processing lines and new copper-chip technologies.
--Mark LaPedus
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