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Secretive DRAM group seeks standard status for its spec
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EE Times


SAN JOSE, Calif. — A secretive group made up of the world's biggest memory makers and Intel Corp. has started circulating to PC makers specifications for a double-data-rate-like DRAM that the group's members hope will succeed Rambus and DDR-2 memories. To generate support for the newly-minted DRAM technology, the Advanced DRAM Technology group will propose the spec to the Jedec standards body by year's end, said one member of the ADT team.

The ADT spec has not been publicly disclosed, but is known to be similar to DDR-2, which uses a lower driving voltage than DDR-1 and uses new signaling technology to provide higher bandwidth. The ADT group is also proposing a more traditional wide bus interface, unlike the narrow, packet-based bus used by Rambus. The group's goal is to drive the ADT DRAM technology into mainstream PCs starting in 2003 or 2004, said Farhad Tabrizi, vice president of worldwide marketing for Hynix Semiconductor and an ADT group member.

After nearly two years of development, the ADT group began providing details of its specification to select OEMs last month, and plans to propose the spec to Jedec perhaps as early as September. The group hopes to merge its spec with Jedec's DDR-2 specification, Tabrizi said.

"It's similar to DDR-2 with some minor modifications to allow more headroom," he said. "We've incorporated some new design techniques so that we can go to much higher frequency than DDR-2."

Tabrizi declined to provide specifics of the signaling technology that will take the ADT spec beyond DDR-2, which uses 1.8-volt technology and differential signaling for both clock and strobe. DDR-1, which is currently in production, is based on 2.5-V technology and uses only a differential clock interface.

OEMs have asked that ADT's technology be made a standard, Tabrizi said. "They want to see ADT in Jedec," he said. "The key to success is making it an open standard, and we believe that means having it become a Jedec standard."

Memory vendors are already planning to sample DDR-2 devices by year's end, and ADT parts aren't expected to arrive until 2003 at the earliest. If Jedec declines to replace its current DDR-2 with ADT or creates a separate standard for ADT, it will likely cause more unwanted fragmentation.

"I definitely don't want two memory standards," said Fred Leung, associate vice president of sales and marketing for chip set vendor Acer Laboratories Inc. (San Jose, Calif.), one of three chip set vendors advising the ADT group. "Otherwise the north bridge memory controller will get too complex, or I would have to offer multiple versions of the chip."

While Jedec has yet to hear ADT's proposal, in practice the lines between the two groups are blurred since leading DRAM makers participate in both. Elpida, Hynix, Infineon, Micron and Samsung worked with Intel in the ADT group.

But unlike Jedec, the ADT group has restricted the number of its participants and kept quiet about its work. This was done to streamline the standards-making process and avoid patent conflicts, Tabrizi said.

It remains uncertain how Rambus Inc. will react to ADT's specification. Tabrizi said ADT's wide bus will cost less than the narrow packet-based interface used by Rambus DRAM.

Rambus claims to hold key patents for DDR technology, some of which is being embraced by ADT.






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