EAST FISHKILL, N.Y. -- IBM Microelectronics here today announced the industry's first standardized PCI-X bridge chip designed for use in high-speed I/O applications.
The chip is design for PCI-X bus applications, including storage area networks, enterprise computing, voice and data communication systems, said Tom Reeves, director, Storage Networking products for IBM Microelectronics.
"The push for faster data rates has put a premium on extremely high-speed designs," Reeves said. "IBM is helping to ease the transition from bus architecture to switched fabrics with the first industry-standard 133-MHz PCI-X bridge. Using our PCI-X intellectual property and ASIC strengths, IBM is enabling our customers to develop advanced technologies that address the increasing need for I/O performance," he added.
PCI-X is an evolutionary upgrade to the standard I/O technology called PCI. PCI-X significantly increases capacity of the conventional PCI bus from 66-MHz to 133-MHz using either a 32-bit or 64-bit bus.
The new IBM PCI-X bridge chip product is backward compatible with the PCI bus standard, ensuring that investments made in PCI-based systems are portable to the newer and faster PCI-X environment. The bridge connects two electrically separate PCI-X bus domains, allowing concurrent operations on both buses. The chip also supports configuration of PCI or PCI-X mode on either bus in any combination.
The IBM 133 PCI-X bridge chip in 1,000-unit quantities is $52. IBM is sampling its new PCI-X bridge chip, with production volumes available in March 2001.
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