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TI licenses MIPS cores for use with DSP in ASICs
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Silicon Strategies


DALLAS — In a move to expand its system-on-a-chip offering, Texas Instruments Inc. has announced an agreement today (2/16) to license 32- and 64-bit RISC processor cores from MIPS Technologies Inc. for use in custom ICs with digital signal processing capabilities.

Under the agreement, TI becomes the first company to license MIPS Technologies' "Jade" and "Opal" processor cores. TI is also a maker of rival Sparc RISC processors from Sun Microsystems Inc.

"By teaming TI's DSP leadership with the MIPS architecture, we anticipate strong growth opportunities," said John Bourgoin, chairman and CEO of MIPS Technologies, based in Mountain View, Calif. "This commitment is an affirmation of the value of the MIPS architecture in high volume embedded markets."

MIPS Technologies said the use of its RISC cores and TI's DSP technology will help usher in a new class of digital applications such as digital consumer appliances, enterprise and home networking, and high-performance mobile computing products.

The 32-bit Jade core is expected to be available in TI's TImeBuilder 0.21-micron drawn process technology for system-level integration by the end of March. The 64-bit Opal core is scheduled to follow in the second half of 1999 and will be introduced on TI's 0.18-micron drawn process technology. These cores will enable TI's ASIC customers to use MIPS-based processor cores in various digital applications including routers, bridges, set-top boxes and Internet appliances, according to the two companies.

Both companies said they intend to work together to develop solutions that best couple TI's DSP cores with the MIPS architecture. Under the relationship, chip customers will be provided with software development tools and verification systems that allow them to rapidly develop dual-processor solutions. TI and MIPS Technologies said they will also work with customers to define application-specific and customer-specific uses of these platforms.






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