TAIPEI, Taiwan — Taiwan's PC core logic designers are preparing dual-channel, double-data-rate designs for release this year. The DDR chip sets will give DRAM a bandwidth edge over Rambus memory in high-performance desktop systems, entry-level servers and workstations.
Silicon Integrated Systems Corp. (SiS) and Via Technologies Inc. are putting the finishing touches on two similar chip sets, the SiS655 and Via P4X600, which offer memory support up to DDR-333. ALi Corp. will not field a device, but Intel Corp. will release a similar chip set, code-named Springdale, next year, which should also support a 667-MHz front-side bus. All of the devices will exceed the front-side bus bandwidth of the Pentium 4 533-MHz Northwood.
Getting ahead of Rambus
The releases will give DDR the bandwidth bragging rights in the high-performance segment of the market, the position that Rambus Inc. is trying to claim as its territory. Currently, systems based on Rambus 1,066 MHz deliver 4.2 Gbytes/second of theoretical system bandwidth, an even match for the Pentium 4.
The dual-channel DDR-333 systems will offer 5.3 Gbytes/s. "Dual-channel DDR chip sets and motherboards will be on the expensive side at first, but DDR's image of popularity gives it an edge," said Bert McComas, principal analyst at InQuest, an IT market research firm.
Currently, Nvidia Corp. is the only company to offer a dual-channel DDR chip set for mainstream PCs, which was released last summer. The company has not claimed much in the way of market share, partly because the set is based on CPUs from Advanced Micro Devices Inc.
"The future transition to DDR-II seems distant and uncertain, and a popular transition to RDRAM seems unlikely. By the process of elimination, it seems that dual-channel DDR has an open window of opportunity," In Quest's McComas said.
Until now, Rambus' raw-bandwidth advantage hasn't translated into huge system performance gains in desktop PCs running more traditional applications, but it has helped in graphics-rich applications. Rambus was also criticized for its dual-channel, dual-RIMM configuration, which prompted a streamlined design in a 32-bit module that makes it possible to upgrade one RIMM at a time.
That has quieted some of the criticism of the Rambus architecture and ostensibly given the memory designer some ammunition against the dual-channel DDR design, which is optimized when both 64-bit channels are populated.
SiS, which recently released the only third-party chip set for Rambus, said its reference designs will help ease board implementation. "We have made sure that the motherboard layout is four-layer and not six-layer," which is cheaper, said Nelson Lee, senior technical marketing manager at SiS.
Lee also rejected speculation that the system would preclude the use of more popular memory modules with eight chips that each use an 8-bit-wide bus. There has been speculation that the 128-bit aggregate bus width would need 16 DDR chips in a module using the x8 configuration. Not so, said Lee, because the system uses two separate 64-bit buses with two memory controllers, hence the "dual-channel" moniker. So to reach a 256-Mbyte module density, it could use eight 256-Mbit chips in a 32-M x8 setup, the same as what's used today in PC systems.
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