The engineers are presenting three papers at different nanotechnology conferences and have claimed that in all cases the underlying interconnect should be able to reduce the power consumption of integrated circuits and enhance the ability to make them smaller as physical wires are not required to send the data, the university said.

UCLA Engineering adjunct professor Mary Mehrnoosh Eshaghian-Wilner, researcher Alexander Khitun and professor Kang Wang have created three nanoscale computational architectures using a technology they pioneered called "spin-wave buses" as the mechanism for interconnection, the university said.

The idea of using spin waves for information transmission and processing was first developed under the name "spin-wave buses" by UCLA Engineering's Khitun, Wang and graduate researcher Roman Ostroumov. "We've made a significant effort to demonstrate the operation of spin-based devices at room temperature," Khitun said. "Our experimental results confirm the intriguing fact that information can be transmitted via spin waves propagating in spin waveguides — ferromagnetic films."

The UCLA team’s thesis is that spin-wave packets can be created and destroyed in nanostructures to perform massively parallel computation efficiently, allowing for the design of the first practical, fully interconnected network of processors on a single chip. This differs from alternative spintronic architectures that rely on a charge transfer to take place simultaneously with spin for information exchange and therefore consume power in the interconnection and have parallelism limitations, the university said.

Eshaghian-Wilner, in conjunction with Khitun and Wang, has developed three innovative, spin-wave bus-based designs that use spin waves to achieve the low-power device performance and improved scalability.

The first device is a reconfigurable mesh interconnected with spin-wave buses. The architecture of the device requires the same number of switches and buses as standard reconfigurable meshes, but is capable of simultaneously transmitting multiple waves using different frequencies on each of the spin-wave buses — making the parallel architecture capable of very fast and fault-tolerant algorithms.

The second architecture invention is a fully connected cluster of functional units with spin-wave buses. Each node simultaneously broadcasts to all other nodes, and can receive and process multiple data concurrently. The novel design allows all nodes to intercommunicate in constant time. This invention overcomes traditional area restrictions found in current networks.

The researchers also have developed a spin-wave-based crossbar for fully interconnecting multiple inputs to multiple outputs. As compared to standard molecular crossbar designs, UCLA Engineering's is much more fault-tolerant allowing alternate paths to be reconfigured in case of switch failure.

"We're tremendously excited about the future of this research," Eshaghian-Wilner said. "The designs demonstrate outstanding performance as interconnects for massively parallel integrated circuits."

Various extensions and applications of these three designs are being studied and evaluated by the UCLA Engineering team and their students. .