SAN DIEGO — Intel Fellow Shekhar Borkar urged chip designers to consider integrating many small cores into future designs rather than relying in a single, complex core.
Speaking at the Design Automation Conference here on
Thursday (June 7), Borkar, director of Intel's Microprocessor Technology Lab, argued, "You cannot simply follow the path of multicore evolution, integrating multiple complex cores on a die."
While Borkar's proposal for integrating lots of smaller cores would mean lower performance than a large, complex core, total compute throughput would be much higher.
He argued that a 1-billion logic transistor, rather than integrating ten large 100-million transistor cores, would allow designers to integrate 100 medium, 10-million transistor cores or even 1,000 smaller cores.
"If you apply Pollack's Rule inversely, performance of a smaller core reduces as square root of the size, but power reduction is linear, resulting in smaller performance degradation with much larger power reduction," said Borkar.
Pollack's Rule states that an increase in performance is roughly proportional to the square root of an increase in complexity. Hence, doubling the logic in a processor will yield only 40 percent more performance.
Multiprocessing, on the other hand, has the potential to provide near-linear performance improvement, Borkar said. Two smaller processors replacing a large, monolithic MPU, can potentially provide up to 80 percent better performance. Also, compute throughput would increase linearly using a larger number of small cores.
Borkar added that "although it is true that a many-core system will deliver higher compute throughput than a multicore system for the same die size and in the same power envelope, it may be difficult to harvest the performance."
A many-core architecture with hundreds or even thousands of small cores requires that designers find ways for closely manage system power and provide an optimized on-die network, said Borkar.
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